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US 2010/0142241 A1Published application
Cam cell memory device
AssigneeHynix Semiconductor Inc.
InventorSung Hoon Ahn
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Abstract
A code address memory (CAM) cell memory device comprises a first storage unit comprising a first nonvolatile memory cell configured to output a power source voltage in response to a read voltage, and a second storage unit comprising a second nonvolatile memory cell configured to output a ground voltage in response to the read voltage.
Claims22
A code address memory (CAM) cell memory device, comprising:
- a first storage unit comprising a first nonvolatile memory cell configured to output a power source voltage in response to a read voltage;
- and
- a second storage unit comprising a second nonvolatile memory cell configured to output a ground voltage in response to the read voltage.
A CAM cell memory device, comprising:
- an operation setting unit configured to output a power source voltage and a ground voltage in response to an operation control signal or in response to the operation control signal and a data signal;
- a first storage unit including a first nonvolatile memory cell configured to output the power source voltage to an output node in response to a read voltage;
- a second storage unit including a second nonvolatile memory cell configured to output the ground voltage to the output node in response to the read voltage;
- and
- an operation voltage generation unit configured to apply a program voltage or the read voltage to gates of the first and second nonvolatile memory cells,
- wherein the first and second nonvolatile memory cells are configured to store data according to the program voltage, and the power source voltage and the ground voltage outputted in response to the operation control signal and the data signal and to output the stored data according to the read voltage, and the power source voltage and the ground voltage outputted in response to the operation control signal.
3 more elements
A CAM cell memory device, comprising:
- an operation selection unit configured to output a data signal when a program operation is performed and output a predetermined voltage when a read operation is performed, in response to an operation control signal;
- a data latch unit configured to output the data signal and an inverted data signal to first and second nodes in response to the data signal and to output a power source voltage and a ground voltage to the first and second nodes in response to the predetermined voltage;
- and
- a CAM cell unit including a first storage unit and a second storage unit, wherein the first storage unit is coupled between the first node and an output node and includes a first nonvolatile memory cell, and the second storage unit is coupled between the second node and the output node and includes a second nonvolatile memory cell,
- wherein the first and second nonvolatile memory cells have threshold voltages that vary in response to the data signal and the inverted data signal when the program operation is performed.
2 more elements
A CAM cell memory device, comprising:
- first and second nonvolatile memory cells with drains electrically coupled together;
- and
- an operation control circuit configured to apply a read voltage or a program voltage to gates of the first and second nonvolatile memory cells, a power source voltage or a ground voltage to a source of the first nonvolatile memory cell, and a ground voltage or a power source voltage to a source of the second nonvolatile memory cell, in response to an operation control signal,
- wherein potentials of the drains of the first and second nonvolatile memory cells are configured to be determined in response to data stored in the first and second nonvolatile memory cells and the power source voltage and the ground voltage applied to the sources of the first and second nonvolatile memory cells.
1 more element
Dependencies are inferred from the claim text.