Configuration of Reconfigurable Interconnect Portions
AssigneeMentor Graphics Corporation
InventorsXavier Montagne, Florent Bedoiseau
Life of this patent
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Abstract
Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease the number of bits needed to load a configuration. Distributed processing resources configure a selected reconfigurable interconnect resource, interconnecting each input of the reconfigurable interconnect resource with a particular output of the reconfigurable interconnect resource using configuration bits scalably extracted from a row of configuration bits of a look-up table. Use of a configuration bit look-up table allows for compression of the bits needed to load the configuration for a reconfigurable interconnect resource.
Claims20
An integrated circuit, comprising:
- first and second reconfigurable interconnect portions;
- a data processing portion configured to extract a second bit pattern from part of a first bit pattern and provide the second bit pattern to configure the second reconfigurable interconnect portion, wherein the first bit pattern is arranged to configure the first reconfigurable interconnect portion.
An integrated circuit comprising:
- a reconfigurable interconnect portion having first pins and second pins;
- a storage unit storing individually selectable bit patterns, each bit pattern associated with one of the first pins and arranged to configure the reconfigurable interconnect portion to connect the associated one of the first pins to any one of the second pins;
- and
- a data processing portion configured to select for each of the second pins a different one of the bit patterns for connecting that second pin to the first pin associated with that different one of the bit patterns.
An integrated circuit, comprising:
- a reconfigurable interconnect portion;
- a data processing portion coupled to the reconfigurable interconnect portion, the data processing portion configured to provide a bit pattern to the reconfigurable interconnect portion to load a configuration of the reconfigurable interconnect portion;
- and
- a storage unit coupled to the data processing portion, the storage unit including a look-up table,
- wherein the look-up table is configured to allow the data processing portion to extract a first set of bits representing the bit pattern and to extract a second set of bits representing a second bit pattern to load a second configuration of a second reconfigurable interconnect portion,
- wherein the second set is a subset of the first set,
- wherein the extraction of the second set of bits from the look-up table maps a common plurality of inputs of the reconfigurable interconnect portion to a plurality of outputs of the reconfigurable interconnect portion.
An integrated circuit comprising a reconfigurable interconnect portion and a storage unit coupled to the reconfigurable interconnect portion, wherein the storage unit stores a look-up table for use in configuring the reconfigurable interconnect portion,
- wherein the data processing portion is configured to extract from the look-up table a set of bits to map a common plurality of inputs of the reconfigurable interconnect portion to a plurality of outputs of the reconfigurable interconnect portion.
Dependencies are inferred from the claim text.