Nanostructures for dislocation blocking in group ii-vi semiconductor devices

A method of fabricating a Group II-VI semiconductor workpiece, comprising the steps of:

• providing at least one substrate material made from a material other than a Group II-VI semiconductor;
• forming at least one antireflective coating onto the substrate;
• forming a photoresist layer above the substrate;
• patterning the photoresist layer to leave spaced-apart islands of photoresist on the antireflective coating, the islands having a pitch in the range of about 100 nm to about 1000 nm;
• etching the antireflective coating and substrate to leave islands of substrate, antireflective coating, and photoresist, each island having a lower end proximate to the substrate and an upper end remote from the substrate;
• and
• selectively forming at least one Group II-VI semiconductor layer on the islands.

A compound semiconductor workpiece, comprising:

• at least one substrate material made from a material other than a Group II-VI semiconductor;
• and
• a plurality of spaced-apart islands formed from a Group II-VI semiconductor seed layer, each island having a lower end proximate to the substrate and an upper end remote from the substrate;
• wherein the islands are on a pitch of from approximately 100 to approximately 1000 nm.

A method of fabricating a compound semiconductor workpiece, comprising the steps of:

• providing at least one substrate material having an upper face of elemental silicon semiconductor;
• forming a silicon nitride layer on the upper face of the substrate;
• depositing at least one photoresist layer above the silicon nitride layer;
• patterning a plurality of holes into the photoresist layer, the holes having a pitch in the range or about 100 nm to about 1000 nm;
• etching the holes in at least the silicon nitride layer;
• and
• filling at least the plurality of holes with Group II-VI semiconductor material.

A compound semiconductor workpiece, comprising:

• at least one substrate material having an upper face of elemental silicon;
• at least one silicon nitride layer grown on the upper face of the substrate;
• a plurality of spaced-apart holes etched into at least the silicon nitride layer to exposed the face of the substrate, the holes having a pitch in the range of about 100 nm to about 1000 nm;
• and
• at least one Group II-VI semiconductor grown in the plurality of holes.