Gallium Nitride Material Devices and Thermal Designs Thereof
AssigneeNitronex Corporation
InventorsSameer Singbal, Andrew Edwards, Chul H. Park, Quinn Martin, Isik Kizilyalli
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Abstract
Gallium nitride material devices and methods associated with the devices are described. The devices may be designed to provide enhanced thermal conduction and reduced thermal resistance. The increased thermal conduction through and out of the gallium nitride devices enhances operability of the devices, including providing excellent RF operation, reliability, and lifetime.
Claims28
A gallium nitride material device comprising:
- a plurality of transistors arranged in a plurality of cells, the transistors within each cell including a gallium nitride material active region, a source electrode, a drain electrode and a gate electrode,
- the gate electrode of each transistor within a cell being separated from the gate electrode of an adjacent transistor within the cell by a gate pitch,
- each cell being separated from an adjacent cell by an inter-cell spacing, wherein each inter-cell spacing is greater than each gate pitch.
A gallium nitride material device comprising:
- a plurality of transistors arranged in a first row and a second row, the first row and second row approximately parallel to each other, each transistor including a gallium nitride material active region, a source electrode, a drain electrode and a gate electrode;
- wherein the transistors of the first row are arranged in a first plurality of cells and the transistors of the second row are arranged in a second plurality of cells;
- and
- wherein the first plurality of cells is staggered from the second plurality of cells such that transistors of a first cell of the first plurality of cells are not horizontally aligned with transistors of a first cell of the second plurality of cells.
A packaged gallium nitride material device comprising:
- a package;
- and
- a gallium nitride material device comprising at least one transistor structure including a gallium nitride material region and source, gate and drain electrodes, the gallium nitride material device having a total gate width of at least 36 mm;
- the gallium nitride material device being supported by the package;
- wherein the packaged device is configured to have a total thermal resistance of less than 1.5° C./W.
A packaged gallium nitride material device comprising:
- a package;
- and
- a gallium nitride material device comprising at least one transistor structure including a gallium nitride material region and source, gate and drain electrodes, the gallium nitride material device having a total gate width of at least 10 mm;
- the gallium nitride material device being supported by the package;
- wherein the packaged device is configured to have a total thermal resistance of less than 4.0° C./W
A packaged gallium nitride material device comprising:
- a package including a supporting portion consisting essentially of copper;
- and
- a gallium nitride material device comprising at least one transistor structure including an active region formed in a gallium nitride material region,
- wherein the gallium nitride material device is supported by the supporting portion of the package.
A method of forming a gallium nitride material device comprising:
- providing a plurality of transistors arranged in a plurality of cells, the transistors within each cell including a gallium nitride material active region, a source electrode, a drain electrode and a gate electrode,
- the gate electrode of each transistor within a cell being separated from the gate electrode of an adjacent transistor within the cell by a gate pitch,
- each cell being separated from an adjacent cell by an inter-cell spacing, wherein each inter-cell spacing is greater than each gate pitch.
A method of forming a gallium nitride material device comprising:
- providing a plurality of transistors arranged in a first row and a second row, the first row and second row approximately parallel to each other, each transistor including a gallium nitride material active region, a source electrode, a drain electrode and a gate electrode;
- wherein the transistors of the first row are arranged in a first plurality of cells and the transistors of the second row are arranged in a second plurality of cells;
- and
- wherein the first plurality of cells is staggered from the second plurality of cells such that transistors of a first cell of the first plurality of cells are not horizontally aligned with transistors of a first cell of the second plurality of cells.
A method of packaging a gallium nitride material device, comprising:
- forming a gallium nitride material device comprising at least one transistor structure including a gallium nitride material region;
- and
- attaching the substrate to a pre-bowed copper material package.
Dependencies are inferred from the claim text.