Silver-selenide/chalcogenide glass stack for resistance variable memory

A memory element comprising:

• a first electrode;
• a first glass material comprising GexSe100-x, wherein x32 20 to 43, said first glass material being in contact with said first electrode,
• a first metal containing material in contact with said first glass material;
• a second glass material in contact with said first metal containing material;
• and
• a second electrode in contact with said second glass material,
• wherein said first metal containing material comprises a plurality of metal containing layers in serial contact with each other.

A memory element comprising:

• a first electrode;
• a first glass material comprising GexSe100-x, wherein x32 20 to 43, said first glass material being in contact with said first electrode;
• a first metal containing material in contact with said first glass material.,
• a second glass material in contact with said first metal containing material;
• and
• a second electrode in contact with said second glass material,
• wherein at least one of said first glass layer material and said second glass layer material comprises a plurality of glass layers in serial contact with each other.

A method of forming a resistance variable memory element comprising:

• forming a first glass material;
• forming a silver-selenide material in contact with said first glass material;
• and
• forming a second glass material in contact with said silver-selenide material, whereby one of said first and second glass materials comprises a chalcogenide glass material,
• wherein said silver-selenide material comprises a plurality of silver-selenide layers in serial contact with each other.

A memory circuit including a resistance variable memory element comprising:

• at least one first metal containing material;
• at least one first chalcogenide glass material;
• at least one second chalcogenide glass material, said metal containing material being provided between said at least one first chalcogenide glass material and said at least one second chalcogenide glass material;
• at least one second metal containing material in contact with said at least one second chalcogenide glass material;
• and
• at least one third chalcogenide glass material in contact with said at least one second metal containing material.

A memory circuit including a resistance variable memory element comprising:

• at least one metal containing material;
• at least one chalcogenide glass material;
• and
• at least one other glass material, said metal containing material being provided between said at least one chalcogenide glass material and said at least one other glass material,
• wherein said at least one chalcogenide glass material comprises a plurality of stacked chalcogenide glass layers.

A memory circuit including a resistance variable memory element comprising:

• at least one metal containing material;
• at least one chalcogenide glass material;
• and
• at least one other glass material, said metal containing material being provided between said at least one chalcogenide glass material and said at least one other glass material,
• wherein said metal containing layer material comprises a plurality of stacked metal containing layers.

A memory circuit including a resistance variable memory element comprising:

• at least one metal containing material;
• at least one chalcogenide glass material;
• and
• at least one other glass material, said metal containing material being provided between said at least one chalcogenide glass material and said at least one other glass material,
• wherein said at least one at least one chalcogenide glass layers material and said at least one other glass material comprises a metal dopant.