Methods and Apparatuses for Automated Circuit Design
AssigneeSynopsys, Inc.
InventorsBing Tian, Kenneth S. McElvain
Life of this patent
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Abstract
Methods and apparatuses to automatically synthesize circuits. In one aspect of an embodiment, a logic function feeding a carry chain is implemented through extending the carry chain and through using the extended portion of the carry chain. In one aspect of an embodiment, control/non-control loads are separated from each other through replicating the driver elements of the mixed control/non-control loads. In one aspect of an embodiment, a read only memory (ROM) is implemented using a random access memory (RAM). In one embodiment, a register at the input side of the ROM is generated through inserting a register that is clocked at an inverted clock signal or through retiming a register from the output side of the ROM.
Claims86
A method implemented on a data processing system for circuit synthesis, the method comprising:
- determining a net of a circuit design, the net driving one or more control loads and one or more non-control loads;
- and
- splitting the net into a first net and a second net, the first net driving the one or more control loads but no non-control load, the second net driving the one or more non-control loads but no control load.
A method implemented on a data processing system for circuit synthesis, the method comprising:
- determining a Read Only Memory (ROM) of a design of a circuit, the ROM having predefined data when the circuit is initialized;
- and
- automatically generating an initialization circuit and a Random Access Memory (RAM) to implement the ROM, the initialization circuit to load the predefined data into the RAM when the circuit is initialized.
A machine readable medium containing executable computer program instructions which when executed by a digital processing system cause said system to perform a method for circuit synthesis, the method comprising:
- determining a net of a circuit design, the net driving one or more first loads to use a first type of routing resources and one or more second loads to use a second type of routing resources;
- and
- splitting the net into a first net and a second net, the first net driving the one or more first loads, the second net driving the one or more second loads.
A machine readable medium containing executable computer program instructions which when executed by a digital processing system cause said system to perform a method for circuit synthesis, the method comprising:
- determining a Read Only Memory (ROM) of a design of a circuit, the ROM having predefined data when the circuit is initialized;
- and
- automatically generating an initialization circuit and a Random Access Memory (RAM) to implement the RUM, the initialization circuit to load the predefined data into the RAM when the circuit is initialized.
A data processing system for circuit synthesis, the data processing system comprising:
- means for determining a portion of a circuit design, the portion comprising a logic function generating an input for a carry chain;
- and
- means for extending the carry chain to implement the logic function using an extended portion of the carry chain.
A data processing system for circuit synthesis, the data processing system comprising:
- means for determining a net of a circuit design, the net driving one or more control loads and one or more non-control loads;
- and
- means for splitting the net into a first net and a second net, the first net driving the one or more control loads but no non-control load, the second net driving the one or more non-control loads but no control load.
A data processing system for circuit synthesis, the data processing system comprising:
- means for determining a Read Only Memory (ROM) of a design of a circuit, the ROM having predefined data when the circuit is initialized;
- and
- means for automatically generating an initialization circuit and a Random Access Memory (RAM) to implement the RUM, the initialization circuit to load the predefined data into the RAM when the circuit is initialized.
A method comprising:
- locating a logic portion having outputs that generate one or more inputs to a first stage of a carry chain of a circuit design;
- and
- reconfiguring logic functions within the logic portion to reduce delays to the carry chain, the reconfiguring being performed on a representation of circuit design, the representation being stored in a memory of a data processing system which includes a processor which performs the reconfiguring.
A machine-readable medium containing executable computer program instructions, which when executed by a digital processing system, cause said system to perform a method comprising:
- locating a logic portion having outputs that generate one or more inputs to a first stage of a carry chain of a circuit design;
- and
- reconfiguring logic functions within the logic portion to reduce delays to the carry chain, the reconfiguring being performed on a representation of a circuit design stored in a memory of the digital processing system.
A data processing system comprising:
- means for locating a logic portion having outputs that generate one or more inputs to a first stage of a carry chain of a circuit design;
- and
- means for reconfiguring logic functions within the logic portion to reduce delays to the carry chain.
Dependencies are inferred from the claim text.