US 2010/0138632 A1Published application

Programmable CORDIC Processor with Stage Re-Use

AssigneeRedpine Signals, Inc.

InventorsPhanimithra Gangalakurti, Karthik Vaidyanathan, Partha Sarathy Murali, InduShekhar Ayyalasomayajula

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Abstract

A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

Claims18

Dependent claims

1) A CORDIC processor having:

a sequencer generating a mode output and a stage number k;
a register memory having a plurality of register locations selected by said sequencer;
at least one re-use stage having an X input and Y input coupled to a register memory location addressed by said sequencer, a sign input and a sign output coupled to a memory, an X output and Y output coupled to a register memory location addressed by said sequencer, a mode control input having a ROTATE or VECTOR value and coupled to said sequencer, and a stage number input k coupled to said sequencer, each said re-use stage having:
a first shift generating an output by shifting said Y input k times;
a second shift generating an output by shifting said X input k times;
a multiplexer having an output coupled to said sign input when said mode control input is ROTATE and to the sign of said Y input when said mode input is VECTOR, said sign of said Y input also forming said sign output;
a first multiplier forming the product of said first shift output and said multiplexer output;
a second multiplier forming the product of said second shift output and an inverted said multiplexer output;
a first adder forming said X output from the sum of said first multiplier output and said X input;
a second adder forming said Y output from the sum of said second multiplier output and said Y input.

7 more elements

12) A CORDIC processor having:

a sequencer generating a register memory address, a mode output, and a cycle count C;
a register memory addressed by said sequencer;
a plurality m of stages, each said stage having an X input, a Y input, an X output, a Y output, a mode input having the value VECTOR or ROTATE provided by said sequencer, a stage number input k, a sign input, and a sign output;
said first stage having said X input and said Y input coupled to a register selected by a controller, each second through m stage X output and Y output coupled to a previous stage said X input and said Y input, respectively, the final m stage output coupled to register memory location provided by said sequencer;
said controller generating said mode input for each said stage, said controller also having an angle register for storing an angle formed from each said stage sign output during said VECTOR mode and providing said angle register to said stage sign inputs during said ROTATE mode;
where, for each said stage m during cycle C, when said mode input is ROTATE:
said X output is the sum of said X input and the product of said sign input multiplied by a said Y input shifted C*m+m times;
said Y output is the sum of said Y input and the product of said X input shifted k times multiplied by inverted said sign input;
and for each said stage, when said mode input is VECTOR:
said X output is the sum of said X input and the product of said Y input shifted said C*m+m times and multiplied by the sign of said Y input;
said Y output is the sum of said Y input and the product of said X input shifted said C*m+m times and multiplied by the inverted sign of said Y input.

8 more elements

Dependencies are inferred from the claim text.