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US 2010/0138616 A1Published application
Input-output virtualization technique
AssigneePhoenix Technologies Ltd.
InventorsGaurav Banga, Kaushik Barde, Richard Bramley, Matthew Ryan Laue
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Abstract
Methods, systems, apparatuses and program products are disclosed for managing device virtualization in hypervisor and hypervisor-related environment which include both pass-thru I/O and emulated I/O.
Claims17
A method of executing a program comprising:
- setting up a SPT (shadow page table) structure in response to trapping an action of a guest program;
- catching a first write of a first MMIO (memory mapped input-output) guest PFN (Page Frame Number), the first write being to a GPT (guest page table) structure of the guest program;
- normalizing the SPT structure to reflect the first MMIO guest PFN;
- and
- reissuing a first input-output operation that is to an MMIO address in a page referenced by the first MMIO guest PFN.
2 more elements
A computer program product comprising:
- at least one computer-readable medium having instructions encoded therein, the instructions when executed by at least one processor cause said at least one processor to
- operate for input-output virtualization by steps comprising the acts of:
- setting up a SPT (shadow page table) structure in response to trapping an action of a guest program;
- catching a first write of a first MMIO (memory mapped input-output) guest PFN (Page Frame Number), the first write being to a GPT (guest page table) structure of the guest program;
- normalizing the SPT structure to reflect the first MMIO guest PFN;
- and
- reissuing a first input-output operation that is to an MMIO address in a page referenced by the first MMIO guest PFN.
4 more elements
A method comprising:
- an act of modulating a signal onto an electromagnetic carrier wave impressed into a tangible medium, or of demodulating the signal from the electromagnetic carrier wave, the signal having instructions encoded therein, the instructions when executed by at least one processor causing said at least one processor to
- operate for input-output virtualization by steps comprising the acts of:
- setting up a SPT (shadow page table) structure in response to trapping an action of a guest program;
- catching a first write of a first MMIO (memory mapped input-output) guest PFN (Page Frame Number), the first write being to a GPT (guest page table) structure of the guest program;
- normalizing the SPT structure to reflect the first MMIO guest PFN;
- and
- reissuing a first input-output operation that is to an MMIO address in a page referenced by the first MMIO guest PFN.
4 more elements
An electronic device comprising:
- at least one controller;
- and
- at least one non-volatile memory having instructions encoded therein, the instructions when executed by the controller cause said controller to
- operate for input-output virtualization by steps comprising the acts of:
- setting up a SPT (shadow page table) structure in response to trapping an action of a guest program;
- catching a first write of a first MMIO (memory mapped input-output) guest PFN (Page Frame Number), the first write being to a GPT (guest page table) structure of the guest program;
- normalizing the SPT structure to reflect the first MMIO guest PFN;
- and
- reissuing a first input-output operation that is to an MMIO address in a page referenced by the first MMIO guest PFN.
6 more elements
Dependencies are inferred from the claim text.