Memory controller, semiconductor recording device, and method for notifying the number of times of rewriting
AssigneePanasonic Corporation
InventorTakeshi Ootsuka
Life of this patent
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AssigneePanasonic Corporation
InventorTakeshi Ootsuka
Estimating the term…
User data transferred from a host apparatus and a first information table 35 indicating correspondence between a logical address and a physical address are recorded in a first region of a flash memory 20. A second information table 38 composed of the physical block address storing the first information table 35 and the number of times of update of the physical block for recording the first information table from the time of manufacturing is recorded in a second region of the flash memory 20. The physical blocks of the first and the second regions are recorded independently from each other in a rotational manner. According to the recording of the second information table, the total number of times of rewriting of the first region is converted. This can suppress the number of times of rewriting of the second region and improve reliability of the number of times of update of the first information table from the time of manufacturing, the number being recorded in the second region.
A semiconductor recording device comprising:
A memory controller which writes data in a nonvolatile memory having a first and a second regions in units of the physical blocks and reads the data from said nonvolatile memory, the memory controller being composed of a plurality of physical blocks, comprising:
A method for notifying the number of times of rewriting comprising steps of:
A semiconductor recording device comprising:
A memory controller which writes data in a nonvolatile memory composed of a plurality of physical blocks and reads the data from said nonvolatile memory, comprising:
A method for notifying the number of times of rewriting comprising steps of:
Dependencies are inferred from the claim text.