Low latency communication via memory windows
AssigneeCray Canada Inc.
InventorsIgor GORODETSKY, Walter James REINHARD
Life of this patent
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Abstract
A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
Claims20
A method for exchanging data between compute nodes of a computer system having a plurality of compute nodes interconnected by an inter-node communication network, each of the compute nodes having a distinct address space and a network interface interconnecting the inter-node communication network to a local packetized interconnect, the method comprising:
- providing a register accessible to the network interface of a sending one of the compute nodes, the register associated with a receiving one of the compute nodes;
- under the control of independent control logic in the network interface of the sending compute node detecting that the register has been modified;
- in response to modification of the register automatically generating a local packetized interconnect packet addressed to an address specified by a value from the register in an address space of the receiving compute node corresponding to the register;
- encapsulating the local packetized interconnect packet in an inter-node communication network packet;
- and forwarding the inter-node communication network packet to the receiving compute node.
A computer system comprising
- a plurality of compute nodes interconnected by an inter-node communication network, each of the compute nodes having an independent address space and comprising:
- a local packetized interconnect,
- a network interface coupled to the local packetized interconnect and the inter-node communication network,
- at least one data processor coupled to the local packetized interconnect;
- and,
- a memory system coupled to the local packetized interconnect;
- wherein a sending one of the compute nodes comprises a register accessible to the network interface of the sending compute node, the register associated with a receiving one of the compute nodes;
- and wherein, the network interface of the sending compute node comprises independent control logic configured to:
- detect modification of the register;
- in response to a detected modification of the register automatically generate a local packetized interconnect packet addressed to an address specified by a value from the register in an address space of the receiving compute node corresponding to the register;
- encapsulate the local packetized interconnect packet in an inter-node communication network packet;
- and,
- forward the inter-node communication network packet to the receiving compute node.
Dependencies are inferred from the claim text.