Method for manufacturing semiconductor package

Abstract

Provided is a method for manufacturing a semiconductor package. The method includes providing a first substrate having a first top surface on which a chip pad is formed and a first bottom surface opposite to the first top surface. The method additionally includes removing a portion of the first top surface to form a sawing groove, and forming a conductive pattern on the first substrate. Also, the method includes removing a portion of the first bottom surface to divide the first substrate into a plurality of semiconductor chips having a redistribution pattern formed of a portion of the conductive pattern, and mounting a selected one of the plurality of semiconductor chips on a second substrate having a second top surface on which a lead is formed. The method further includes forming an interconnector electrically connecting the lead to the redistribution pattern.

Dependencies are inferred from the claim text.