High integrated semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorHyung-Sik WON
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device, having a 6F2 open bit line structure, connects each bit line of a bit line pair to a respective bit line of a neighboring bit line pair for a precharge operation so that a layout size of the semiconductor memory device decreases. Plural first precharge units each precharge one bit line of a first bit line pair and one bit line of a second bit line pair in response to a bit line equalizing signal. Plural sense amplifiers each sense a data bit supplied to a respective one of the first and second bit line pairs and amplify sensed data.
Claims14
1-14. (canceled)
A semiconductor memory device, comprising:
- first and second bit line pairs, each of which includes first and second bit lines;
- a first sense amplifier configured to sense and amplify a data supplied from the first bit line pair;
- a second sense amplifier configured to sense and amplify a data supplied from the second bit line pair;
- a first precharge unit configured to precharge the first bit lines of the first and second bit line pairs in response to a bit line equalizing signal;
- and
- a second precharge unit configured to precharge the second bit lines of the first and second bit line pairs in response to the bit line equalizing signal,
- wherein the first and second bit lines are disposed in opposite directions from each of the corresponding sense amplifiers.
A semiconductor memory device, comprising:
- a first sense amplifier coupled to first and second bit lines;
- a second sense amplifier coupled to third and fourth bit lines;
- a first precharge unit coupled to the first and third bit lines;
- and
- a second precharge unit coupled to the second and fourth bit lines.
Dependencies are inferred from the claim text.