Output driving circuits of output buffers for source driver integrated circuits

An output driving circuit of an output buffer of a source driver integrated circuit of a liquid crystal display device, the circuit comprising:

• a pull-up transistor including, a first channel region coupled to a power voltage terminal and an output terminal, and a first gate coupled to a pull-up signal line;
• a pull-down transistor including, a second channel region coupled to the output terminal and a ground voltage terminal, and a second gate coupled to a pull-down signal line;
• a sub pull-up output driving unit including a third channel region coupled in parallel to the pull-up transistor between the power voltage terminal and the output terminal, the sub pull-up output driving unit configured to perform a pull-up operation together with the pull-up transistor during a normal operation period in which a horizontal synchronization signal is active and configured to be disabled in response to a first control signal applied during a period in which the horizontal synchronization signal is inactive, a combined leakage current through the first and third channels being reduced during a period in which the sub pull-up output driving unit is disabled;
• and
• a sub pull-down output driving unit including a fourth channel region coupled in parallel to the pull-down transistor between the output terminal and the ground voltage terminal, the sub pull-down output driving unit configured to perform a pull-down operation together with the pull-down transistor in the normal operation period, and being disabled in response to a second control signal applied during a period in which the horizontal synchronization signal is inactive, a combined leakage current through the second and fourth channels being reduced during a period in which the sub pull-down output driving unit is disabled.

An output driving circuit, comprising:

• at least one pull-up transistor, connected between an output terminal and a first voltage terminal;
• at least one pull-down transistor, connected between the output terminal and a second voltage terminal;
• at least one switch, connected between a gate of one of the at least one pull-up transistor and the at least one pull-down transistor and a corresponding pull-up or pull-down signal line;
• and
• at least one cutoff MOS transistor coupled to the switch and the gate.