Methods and apparatus to reduce idle current in power amplifiers
AssigneeTexas Instruments Incorporated
InventorDaniel Andrew Mavencamp
Life of this patent
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Abstract
Power amplifiers with reduced idle currents are described. In some examples, a power amplifier includes a driver configured to generate a control signal based on an input signal. The power amplifier also includes a first output transistor configured to selectively provide an output signal via an output channel that has a resistance based on the control signal, and a channel adjuster configured to generate several digital signals based on the control signal. A composite switch, which includes several segment transistors, is included to selectively increase or decrease the output channel resistance based on the digital signals.
Claims20
A power amplifier circuit, comprising:
- a driver configured to generate a control signal based on an input signal;
- a first output transistor coupled to the control signal, configured to selectively provide an output signal representative of the input signal, via an output channel having a resistance based on the control signal;
- a channel adjuster coupled to the control signal, configured to generate a plurality of digital signals based on the control signal;
- and
- a composite switch, comprising a plurality of segment transistors, configured to selectively increase or decrease the output channel resistance based on the plurality of digital signals to provide the output signal.
A method to reduce idle current in an amplifier, comprising:
- monitoring a first control signal to a first output transistor that provides a first output channel between a power supply and an output terminal;
- determining whether the first control signal has increased above a high threshold or decreased below a low threshold;
- decreasing the resistance of the first output channel in response to the first control signal increasing above the high threshold by enabling a first segment transistor to provide a parallel current path between the power supply and the output terminal;
- and
- increasing the resistance of the first output channel in response to the first control signal decreasing below the low threshold by disabling at least one of the first segment transistor or a second segment transistor.
A system to limit idle current in an amplifier, comprising:
- a first high-side field effect transistor (FET) configured to couple an output terminal to a voltage supply based on an input signal and a low-side FET configured to couple the output terminal to a reference terminal based on the input signal;
- a driver configured to control the high-side FET via a high-side control voltage and configured to control the low-side FET via a low-side control voltage, based on the input signal;
- a high-side channel adjuster configured to turn on an additional high-side FET in response to the high-side control voltage increasing above a first threshold voltage, and configured to turn off the additional high-side FET in response to the high-side control voltage decreasing below a second threshold voltage, wherein the additional high-side FET is configured to couple the output terminal to the voltage supply to increase a voltage at the output terminal;
- and
- a low-side channel adjuster configured to turn on an additional low-side FET in response to the low-side control voltage increasing above the first threshold voltage, and configured to turn off the additional low-side FET in response to the low-side control voltage decreasing below the second threshold voltage to couple the output terminal to the reference terminal to decrease the voltage at the output terminal.
Dependencies are inferred from the claim text.