Clock signal generation circuit
AssigneeFujitsu Limited
InventorMasafumi KONDOU
Life of this patent
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Abstract
A clock signal generation apparatus includes a clock signal generation circuit generating a plurality of clock signals, and a self-test circuit measuring a phase difference of one pair of clock signals. The self-test circuit includes a clock signal selection circuit selecting the pair of clock signals among the plurality of clock signals, a phase detection circuit generating a phase difference pulse signal, a test signal generation circuit generating a test signal having a frequency which is lower than the phase difference pulse signal, and a counter circuit counting the pulse number of the test signal.
Claims8
A clock signal generation apparatus comprising:
- a clock signal generation circuit configured to generate a plurality of clock signals, each of the plurality of clock signals having a certain phase difference with respect to a phase of a reference clock;
- and
- a self-test circuit configured to measure a phase difference of one pair of clock signals, among the plurality of clock signals, which have adjacent phases, wherein
- the self-test circuit comprises:
- a clock selection circuit configured to select the pair of clock signals among the plurality of clock signals;
- a phase detection circuit configured to generate a phase difference pulse signal having a pulse width corresponding to the phase difference of the selected pair of clock signals;
- a test signal generation circuit configured to generate a test signal having a frequency which is proportional to the pulse width of the phase difference pulse signal, and is lower than the phase difference pulse signal;
- and
- a counter circuit configured to count the pulse number of the test signal generated within a reference period.
A clock signal generation apparatus comprising:
- a clock signal generation circuit configured to generate a first clock signal having a first phase, and a second clock signal having a second phase different from the first phase;
- a phase detection circuit configured to generate a phase difference pulse signal having a pulse width corresponding to a phase difference between the first phase and the second phase;
- a test signal generation circuit configured to generate a test signal having a first frequency, being a frequency proportional to the pulse width of the phase difference pulse signal, lower than a second frequency of the phase difference pulse signal;
- and
- a counter circuit configured to count pulse number of the test signal generated within a reference period.
Dependencies are inferred from the claim text.