System and method for a/d conversion
AssigneeInfineon Technologies AG
InventorOlivier Trescases
Life of this patent
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Abstract
In one embodiment, a method of performing an A/D conversion includes comparing a reference signal to a ramp signal, comparing an input signal to the ramp signal and causing a signal to propagate through a delay line when the ramp signal crosses a first of the reference signal or the input signal. The state of the delay line is stored when the ramp signal crosses a second of the reference signal or the input signal after the ramp signal crosses the first of the reference signal or the input signal.
Claims43
An analog to digital (A/D) converter comprising:
- a ramp signal generator comprising a ramp signal output and a clock trigger input;
- a delay line comprising a plurality of delay elements;
- a delay line controller configured to
- activate the delay line and initiate a signal propagating through the delay line when the ramp signal output first crosses a first of an A/D converter input signal at an A/D input or a reference signal at a reference signal input, and
- deactivate the delay line and sample a state output of the delay line when the ramp signal crosses a second of the A/D converter input signal or the reference signal;
- and
- a slope calibration module coupled to the ramp generator, the calibration module configured to adjust a slope of the ramp signal output.
An analog to digital (A/D) converter comprising:
- a ramp signal generator comprising a ramp signal output and a clock trigger input;
- an active comparator comprising a first input coupled to the ramp signal output and a second input coupled to an A/D input;
- a reference comparator comprising a first input coupled to the ramp signal output and a second input coupled to a reference signal;
- control logic coupled to an output of the reference comparator and an output of the active comparator, wherein
- the control logic is configured to assert a start signal if the output of the reference comparator or the output of the active comparator is active, and
- the control logic is further configured to assert a stop signal if both the output of the reference comparator and the output of the active comparator is active;
- and
- a delay line comprising a plurality of delay elements, the delay line coupled to a start signal and a stop signal, wherein the delay line is configured to
- activate the delay line and initiate a signal propagating through the delay line when the start signal becomes active and the stop signal is inactive, and
- deactivate the delay line and produce a state output of the delay line when the stop signal becomes active.
A method of performing an analog to digital (A/D) conversion comprising:
- comparing a reference signal to a ramp signal;
- comparing an input signal to the ramp signal;
- causing a signal to propagate through a delay line when the ramp signal crosses a first of the reference signal or the input signal;
- and
- storing a state of the delay line when the ramp signal crosses a second of the reference signal or the input signal after the ramp signal crosses the first of the reference signal or the input signal.
A delay element comprising:
- a first switch comprising a control terminal coupled to a delay element input, and an output terminal loaded by a first current source;
- a second switch comprising a control terminal coupled to the output terminal of the first switch, and an output terminal loaded by a second current source;
- a latch comprising an input coupled to the output terminal of the second switch, and an output coupled to a delay element output;
- and
- a third switch coupled in series with the second switch, the third switch comprising a control terminal coupled to a stop signal input.
A power supply system comprising:
- a power converter comprising a power input, an output, and a control terminal, the control terminal controlling the output;
- and
- a feedback network coupled between the output and the control terminal, the feedback network comprising an analog to digital (A/D) converter configured to convert a difference between a reference voltage and a voltage proportional to a voltage at the output of the power converter, the A/D converter comprising
- a ramp signal generator comprising a ramp signal output and a clock trigger input,
- an active comparator comprising a first input coupled to the ramp signal output and a second input coupled to an A/D converter input,
- a reference comparator comprising a first input coupled to the ramp signal output and a second input coupled to a reference signal,
- control logic coupled to an output of the reference comparator and an output of the active comparator, wherein
- the control logic is configured to assert a start signal if the output of the reference comparator or the output of the active comparator is active, and
- the control logic is further configured to assert a stop signal if the output of the reference comparator and the output of the active comparator is active, and
- a delay line comprising a plurality of delay elements coupled to the start signal and stop signal, wherein the delay line is configured to
- activate the delay line and initiate a signal propagating through the delay line when the start signal becomes active and the stop signal is inactive, and
- deactivate the delay line and produce a state output of the delay line when the stop signal becomes active.
Dependencies are inferred from the claim text.