Semiconductor device
AssigneeInfineon Technologies AG
InventorThorsten Meyer
Life of this patent
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Abstract
A semiconductor device includes a semiconductor chip, an electrically insulating element separated from the semiconductor chip by a space, and encapsulation material disposed in the space. The semiconductor chip includes a first face having a contact, and the electrically insulating element defines at least one through-hole. The encapsulation material is disposed around the semiconductor chip and around the electrically insulating element. Electrically conducting material is deposited in the through-hole of the electrically insulating element and communicates with the contact.
Claims25
A semiconductor device comprising:
- a semiconductor chip including a first face comprising a contact;
- an electrically insulating element separated from the semiconductor chip by a space, the electrically insulating element defining at least one through-hole;
- encapsulation material disposed in the space and around the semiconductor chip and around the electrically insulating element;
- and
- electrically conducting material deposited in the at least one through-hole of the electrically insulating element and communicating with the contact.
A method of assembling a semiconductor device comprising:
- placing at least two semiconductor chips on a carrier;
- placing at least two electrically insulating material elements on the carrier;
- applying encapsulation material over the at least two semiconductor chips and the at least two electrically insulating material elements to form an encapsulation workpiece;
- generating at least one through-hole through each of the electrically insulating material elements;
- and
- filling the at least one through-holes with an electrically conducting material.
The method of claim 17, comprising connecting the second electrically conducting layer to the electrically conducting material in the through-holes.
A method of fabricating a semiconductor package comprising:
- placing semiconductor chips on a carrier;
- spacing electrically insulating elements on the carrier away from the semiconductor chips;
- applying encapsulation material over the semiconductor chips and around the electrically insulating elements to form an encapsulation workpiece;
- and
- providing at least one electrical pathway through each of the electrically insulating elements to enable coupling an electronic device to the workpiece that communicates with at least one of the semiconductor chips.
A semiconductor package comprising:
- at least one semiconductor chip;
- at least one element comprising a first electrically insulating material and defining at least one through-hole;
- an encapsulation body having a first main face and a second main face opposite the first main face, the encapsulation body comprising a second electrically insulating material surrounding the at least one semiconductor chip and the at least one element;
- a first electrically conducting layer disposed on the first main face;
- a second electrically conducting layer disposed on the second main face;
- and
- electrically conducting material disposed in the at least one through-hole connecting the first electrically conducting layer with the second electrically conducting layer.
Dependencies are inferred from the claim text.