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US 2010/0133679 A1Published application
Compliant integrated circuit package substrate
AssigneeIntel Corporation
InventorsBiju Chandran, Mitul Modi
Life of this patent
Estimating the term…
Abstract
An integrated circuit package may include a plurality of interconnects, and an integrated package substrate coupled to the plurality of interconnects and comprising an integrated circuit package substrate core. A first surface of the integrated circuit package substrate core may define a depression.
Claims13
An integrated circuit package comprising:
- a plurality of interconnects;
- and
- an integrated package substrate coupled to the plurality of interconnects and comprising an integrated circuit package substrate core,
- wherein a first surface of the integrated circuit package substrate core defines a depression entirely filled with a dielectric,
- wherein a second surface of the integrated circuit package substrate core defines a second depression entirely filled with the dielectric, and
- wherein the second depression substantially mirrors the depression through the integrated circuit package substrate core.
3 more elements
A system comprising:
- a microprocessor die;
- an integrated package substrate coupled to the microprocessor die and comprising an integrated circuit package substrate core;
- a plurality of interconnects coupled to the integrated package substrate;
- and
- a double data rate memory in communication with the microprocessor die,
- wherein a first surface of the integrated circuit package substrate core defines a depression entirely filled with a dielectric,
- wherein a second surface of the integrated circuit package substrate core defines a second depression entirely filled with the dielectric, and
- wherein the second depression substantially mirrors the depression through the integrated circuit package substrate core.
5 more elements
Dependencies are inferred from the claim text.