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US 2010/0133500 A1Published application
Memory Cell Having a Side Electrode Contact
AssigneeMacronix International Co., Ltd.
InventorHsiang-Lan Lung
Life of this patent
Estimating the term…
Abstract
Memory cells are described along with methods for manufacturing. A memory cell as described herein includes a bottom electrode, a memory element and a side electrode. The bottom electrode contacts the memory element at a first contact surface on the bottom of the memory element. The side electrode contacts the memory element at a second contact surface on the side of the memory element, where the second contact surface on the side faces laterally relative to the first contact surface on the bottom.
Claims12
A memory device comprising:
- a bottom electrode having a width and a top surface;
- an access line having a via extending therethrough, the via overlying the bottom electrode and having a width greater than the width of the bottom electrode, the via having an inner surface;
- and
- a memory element within the via, the memory element having a bottom surface in contact with the top surface of the bottom electrode, and having an outer surface surrounded by and in contact with the inner surface of the via.
1 more element
A memory device comprising:
- a conductive contact having a top surface;
- a conductive line over the conductive contact;
- a via through the conductive line and having a bottom area, wherein the top surface of the conductive contact is in the bottom area of the via;
- and
- a cup-shaped memory element within the via and coupled to the conductive contact and the conductive line, the memory element having an outer surface surrounded by an inner surface of the via.
2 more elements
A memory device comprising:
- a bit line having a via, the via having a width and an inner surface;
- a bottom electrode under the via and having a width, the width of the via larger than the width of the bottom electrode;
- and a concave memory element having a base portion and a sidewall portion within the via, the base portion coupled to the bottom electrode and the sidewall portion is coupled with the bit line, and the sidewall portion of the memory element has an outer surface surrounded by the inner surface of the via.
Dependencies are inferred from the claim text.