Secure Communication Interface for Secure Multi-Processor System

A method of providing secure data transfer between a first memory accessible by a first processor and a second memory accessible by a second, secure processor in a multi-processor system, where the first processor and the second processor are coupled together by a secure controller, the method comprising:

• receiving at the secure controller a data transfer request from the first processor;
• verifying that the data transfer request is targeted for a memory window defined in the second memory;
• verifying that the amount of data to be transferred is less than or equal to a size of the memory window;
• and
• if the data transfer request is targeted for the memory window and the amount of data to be transferred is less than or equal to the size of the memory window, transferring the data from the first memory to the memory window defined in the second memory.

A system comprising:

• means for receiving at a secure controller a data transfer request from a first processor;
• means for verifying that the data transfer request is targeted for a memory window defined in a second memory accessible by a second, secure processor coupled to the secure controller;
• means for verifying that the amount of data to be transferred is less than or equal to the memory window;
• and
• means for transferring the data from a first memory accessible by the first processor to the memory window defined in the second memory, where the transferring occurs if the data transfer request is targeted for the memory window and the amount of data to be transferred is less than or equal to the memory window.