Automatic data recovery circuit and data error detection circuit

An automatic data recovery circuit comprising:

• a register that stores a register data including input data and remainder data generated by performing a cyclic redundancy check calculation on the input data;
• an error detection unit that generates an error detection signal, indicating whether an error is detected in the register data, by performing a modular calculation on the register data;
• and
• a data recovery unit that recovers the input data when an error is detected in the input data based on the error detection signal and comparison data generated by comparing the input data stored in the register with a reference voltage.

A data error detection circuit comprising:

• an encoder that generates at least one parity bit by encoding a fixed bit and data, provided from a memory, and provides a Hamming code including the data, the fixed bit and at least one parity bit;
• a register that stores the Hamming code;
• and
• an error detection unit that provides the memory with an error detection signal indicating whether an error is detected in the data stored in the register by performing a parity check on the Hamming code stored in the register.