Memory System with Point-to-Point Request Interconnect
AssigneeRambus Inc.
InventorsRichard E. Perego, Frederick A. Ware
Life of this patent
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AssigneeRambus Inc.
InventorsRichard E. Perego, Frederick A. Ware
Estimating the term…
A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports are coupled, via point-to-point connections, to from one to N memory devices, each of which includes N independently addressable memory blocks. All of the external request ports are connected to respective external request ports on the memory device or devices used in a given configuration. The number of request ports per memory device and the data width of each memory device changes with the number of memory devices such that the ratio of the request-access granularity to the data granularity remains constant irrespective of the number of memory devices.
An integrated circuit memory device comprising:
A memory controller comprising:
A calibration method for a memory device that includes a request interface, a bidirectional interface, and addressable memory, the method comprising:
A method performed by a memory device having a request interface, a data interface, and a memory, the method comprising:
Dependencies are inferred from the claim text.