Microprocessor system having a plurality of microprocessors which are connected to one another by signaling technology

Abstract

A microprocessor system includes a plurality of microprocessors which are connected to one another by signaling technology. In order to temporally synchronize the microprocessors in a relatively simple manner, it is proposed in at least one embodiment that provision be made of a central clock generator which outputs a clock signal in the form of temporally successive pulses to all microprocessors in a parallel manner, that provision be made of a master which can switch the output of the clock signal on and off, that all microprocessors sum the clock signal from the central clock generator in the form of a counter reading in each case, that the master be able to reset the counter readings of all microprocessors. In at least one embodiment, in order to synchronize all microprocessors, the master first of all interrupt the output of the clock signal, then set all counter readings to a defined value, and then cancel the interruption of the output of the clock signal again.

Dependencies are inferred from the claim text.