Conserving power in a computer system

An apparatus to conserve power comprising:

• an interface unit,
• a power state manager coupled to the interface unit, wherein the power state manager is to,
• determine break-even periods associated with a plurality of power saving states,
• determine a power saving state for a computer system to enter, wherein the power saving state is determined using a break-even period associated with the power saving state and an expected idle duration, if a first saving policy is selected, and
• determine the power saving state for the computer system to enter, wherein the power saving state is determined using the break even period and an actual idle duration, if a second saving policy is selected, and
• a sleep state induction unit coupled to the power state manager, wherein the sleep state induction unit is to transition the computer system to the power saving state.

A machine-readable storage medium comprising a plurality of instructions that in response to being executed result in a processor comprising:

• determining break-even periods associated with a plurality of power saving states,
• determining a power saving state for a computer system to enter, wherein the power saving state is determined using a break-even period associated with the power saving state and an expected idle duration, if a first saving policy is selected,
• determining the power saving state for the computer system to enter, wherein the power saving state is determined using the break even period and an actual idle duration, if a second saving policy is selected, and
• transitioning the computer system to the power saving state.

A system comprising:

• a processor,
• a chipset coupled to the processor,
• a memory coupled to the chipset,
• a plurality of input-output devices coupled to the chipset, and
• a power management unit coupled to the processor, the chipset, and the input-output devices, wherein the power management unit is to,
• determine break-even periods associated with a plurality of power saving states,
• determine a power saving state for a computer system to enter, wherein the power saving state is determined using a break-even period associated with the power saving state and an expected idle duration, if a first saving policy is selected, and
• determine the power saving state for the computer system to enter, wherein the power saving state is determined using the break even period and an actual idle duration, if a second saving policy is selected, and transition the computer system to the power saving state.