Methods and apparatuses for reducing power consumption of fully-buffered dual inline memory modules

Abstract

Methods and apparatuses are presented for reducing the power consumed in an in-line memory module. In some embodiments, the method may include monitoring a memory requirement of a computer system, the computer system comprising a plurality of memory modules. In the event that the memory requirement changes, unmapping at least one of the plurality of memory modules and maintaining a low power state for the at least one unmapped memory module. The method may further comprise selectively re-initializing the plurality of memory modules such that the at least one unmapped memory module remains in a low power state while the remainder of the plurality of memory modules are in a non-low power state. Where, in the event that the memory requirement changes again, the method also may comprise re-programming the memory controller with an identifier associated with the at least one unmapped memory module.

Dependencies are inferred from the claim text.