Bit-error rate tester with pattern generation

A method of using a testing apparatus to test a peripheral component of an electronic device, the method comprising:

• sending an initial value to the testing apparatus and to the peripheral component;
• using the initial value as a seed value in the peripheral component to generate a receiver test pattern;
• using the initial value as a seed value in the testing apparatus to generate a transmitter test pattern;
• wherein:
• the peripheral component and the testing apparatus operate identically on the seed value to generate the receiver test pattern and the transmitter test pattern;
• sending the transmitter test pattern to the peripheral component;
• and
• comparing, in the testing circuitry, the transmitter test pattern received from the testing apparatus to the receiver test pattern.

Testing circuitry in a peripheral component of an electronic device, the testing circuitry comprising:

• component pattern circuitry for generating a varying component test pattern based on a pattern input value;
• comparator circuitry that compares the component test pattern to an external test pattern received from external testing apparatus;
• first input circuitry for receiving the pattern input value;
• and
• second input circuitry for receiving the external test pattern.

Testing apparatus for testing a peripheral component of an electronic device, wherein the peripheral component has a driver including testing circuitry, and the testing circuitry includes (a) receiver pattern circuitry for generating a varying receiver test pattern based on a receiver pattern input value and (b) comparator circuitry that compares a transmitter test pattern received from the testing apparatus to the receiver test pattern;

• the testing apparatus comprising:
• transmitter pattern circuitry for generating a varying transmitter test pattern, and
• circuitry for sending the transmitter test pattern to the testing circuitry;
• wherein:
• the transmitter pattern circuitry operates identically to the receiver pattern circuitry and, such that the receiver test pattern and the transmitter test pattern are identical when the receiver pattern input value and the transmitter pattern input value are identical;
• the apparatus further comprising:
• input circuitry for inputting an initial value as both the receiver pattern input value and the transmitter pattern input value.