Memory System Supporting Nonvolatile Physical Memory
AssigneeRambus Inc.
InventorsFrederick A. Ware, Ely K. Tsern
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Abstract
A memory system includes nonvolatile physical memory, such as flash memory, that exhibits a wear mechanism asymmetrically associated with write operations. A relatively small cache of volatile memory reduces the number of writes, and wear-leveling memory access methods distribute writes evenly over the nonvolatile memory.
Claims29
A memory system:
- a. nonvolatile memory having a plurality of erase units, each erase unit including a plurality of nonvolatile access units, each nonvolatile access unit specified by a respective nonvolatile-access-unit address;
- b. random-access memory (RAM) having a plurality of volatile access units, each volatile access unit specified by a respective volatile-access-unit address, the RAM to store an address translation table to map volatile-access-unit addresses to nonvolatile-access-unit addresses;
- and
- c. a memory controller having a first data bus coupled to the nonvolatile memory, a second data bus coupled to the RAM, and a next-access-unit register to store the nonvolatile-access-unit address of a next one of the nonvolatile access units to receive write data.
A memory-access method for a memory system with physical memory that includes a plurality of volatile-storage locations addressed by a corresponding plurality of volatile-storage addresses and a plurality of nonvolatile storage locations addressed by a corresponding plurality of nonvolatile-storage addresses, each of the nonvolatile storage locations storing an information unit, the method comprising:
- a. copying the information unit from one of the nonvolatile storage locations into one of the volatile storage locations;
- and
- b. saving a mapping associating the volatile-storage address for the one volatile storage location to the nonvolatile-storage address for the one nonvolatile storage location.
A system comprising:
- a. a memory controller to receive a physical address;
- b. memory, coupled to the memory controller, to store an address mapping table accessible by the memory controller;
- and
- c. a plurality of nonvolatile memory ICs coupled to the memory controller, each of the nonvolatile memory ICs having a plurality of nonvolatile access units identified by a respective nonvolatile address;
- d. wherein the memory controller uses the mapping table to convert the physical address to one of the nonvolatile addresses.
A computer-readable medium having stored thereon a data structure defining a memory controller adapted to access a physical memory that includes a plurality of volatile-storage locations addressed by a corresponding plurality of volatile-storage addresses and a plurality of nonvolatile storage locations addressed by a corresponding plurality of nonvolatile-storage addresses, each of the nonvolatile storage locations storing an information unit, the data structure comprising data representing a next-access-unit register to store the nonvolatile-access-unit address of a next one of the nonvolatile access units to receive write data.
A memory system comprising:
- a. physical memory that includes a plurality of volatile-storage locations addressed by a corresponding plurality of volatile-storage addresses and a plurality of nonvolatile storage locations addressed by a corresponding plurality of nonvolatile-storage addresses, each of the nonvolatile storage locations storing an information unit;
- b. means for copying the information unit from one of the nonvolatile storage locations into one of the volatile storage locations;
- and
- c. means for saving a mapping associating the volatile-storage address for the one volatile storage location to the nonvolatile-storage address for the one nonvolatile storage location.
A memory system comprising:
- a. a first nonvolatile memory IC having a first plurality of nonvolatile access units addressed by respective ones of a first plurality of addresses;
- and
- b. a second nonvolatile memory IC having a second plurality of nonvolatile access units addressed by respective ones of a second plurality of addresses;
- c. wherein the first nonvolatile memory IC is to store an address table mapping physical addresses to ones of the second plurality of addresses.
Dependencies are inferred from the claim text.