Sti stress modulation with additional implantation and natural pad sin mask
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Han Liao, Tze-Liang Lee, Ling-Yen Yeh, Mong-Song Liang
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Abstract
A method of manufacturing a semiconductor structure is provided. The method includes forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions; forming a trench in the semiconductor substrate within an opening defined by the hard mask pattern; filling the trench with a dielectric material, resulting in a trench isolation feature; performing an ion implantation to the trench isolation feature using the hard mask pattern to protect active regions of the semiconductor substrate; and removing the hard mask pattern after the performing of the ion implantation.
Claims20
A method of manufacturing a semiconductor structure, comprising:
- forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions;
- forming a trench in the semiconductor substrate within an opening defined by the hard mask pattern;
- filling the trench with a dielectric material, resulting in a trench isolation feature;
- performing an ion implantation to the trench isolation feature using the hard mask pattern to protect active regions of the semiconductor substrate;
- and
- removing the hard mask pattern after the performing of the ion implantation.
A method of manufacturing a semiconductor structure, comprising:
- forming a thermal silicon oxide layer on a semiconductor substrate;
- forming a silicon nitride layer on the thermal silicon oxide layer;
- patterning the silicon nitride layer and thermal silicon oxide layer to form silicon nitride mask defining openings exposing portions of the semiconductor substrate;
- forming trenches in the semiconductor substrate within the openings;
- filling the trenches with a dielectric material, resulting in shallow trench isolation (STI) features;
- performing an ion implantation to the STI features using the silicon nitride mask to protect active regions of the semiconductor substrate;
- thereafter forming a capping film on the semiconductor substrate;
- thereafter performing a thermal annealing process to the semiconductor substrate;
- and
- thereafter removing the capping film and the silicon nitride mask.
A method of manufacturing a semiconductor structure, comprising:
- forming a shallow trench isolation feature having a dielectric material in a silicon substrate within an opening of a silicon nitride layer on the silicon substrate;
- ion implanting the STI feature using the silicon nitride layer as a hard mask to protect active regions of the silicon substrate;
- forming a capping film on the silicon substrate;
- annealing the STI;
- and
- removing the capping film and the silicon nitride layer.
Dependencies are inferred from the claim text.