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US 2010/0074385 A1Published application
Digital Transmit Phase Trimming
AssigneeRambus Inc.
InventorWilliam J. Dally
Life of this patent
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Abstract
A circuit has a phase adjustment circuit to generate an adjusted clock signal by adjusting a first clock signal in accordance with a control signal. A multiplexer receives input data signals on a plurality of first data lines and outputs onto at least one second data line output data signals in accordance with a plurality of second clock signals. A timing measurement circuit determines at least one timing parameter of at least one output data signal on at least the one second data line and generates the control signal in accordance with a deviation of at least the one timing parameter from a desired value.
Claims16
A circuit, comprising:
- a circuit for generating a plurality of output data signals on at least one output data line at times controlled by a plurality of clock signals;
- and
- a first phase adjustment circuit and a second phase adjustment circuit, the first phase adjustment circuit and the second phase adjustment circuit each coupled to at least one of the plurality of clock signals, wherein the first phase adjustment circuit adjusts a first edge time of a respective output data signal and the second phase adjustment circuit adjusts a second edge time of the respective output data signal, the adjustments of the first edge time and the second edge time in accordance with phase adjustments to at least two of the clock signals.
Dependencies are inferred from the claim text.