Packet synchronization switching method and gateway device
AssigneeOki Electronic Industry Co., Ltd.
InventorYuzuru Masuya
Life of this patent
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Abstract
A gateway device includes plural electronic circuit boards with redundant structures, between first and second networks, which are different. The gateway device receives data provided through the first network and, after applying data processing, outputs data to the second network. Data processing reference timings and time information, which are common in the gateway device, are shared, the data processing is executed in synchronization with the reference timings, and synchronized packets are provided. System switching between the electronic circuit boards is executed in accordance with the time information. Thus, packet outputs are synchronously switched.
Claims5
A packet synchronization switching method for synchronously switching output of packets at a gateway device between first and second networks, which are different, the gateway device including a plurality of redundantly structured electronic circuit boards, receiving data provided from the first network and, after performing data processing, outputting data to the second network, the method comprising:
- sharing a reference timing of the data processing and time information, which are common in the gateway device;
- performing the data processing in synchronization with the reference timing and providing the packets, which are synchronized;
- and
- executing system switching between the electronic circuit boards in accordance with the time information.
A gateway device comprising:
- a redundantly structured plurality of electronic circuit boards, which receive data provided from a first network and, after performing data processing, output data to a second network;
- and
- a controller that generates reference timings of the data processing and the time information, which are common in the gateway device, and transmits the reference timings and time information to the plurality of electronic circuit boards, and that instructs system switching between the electronic circuit boards in accordance with the time information,
- wherein the plurality of electronic circuit boards execute the data processing in synchronization with the reference timings and provide synchronized packets, and output of the packets is synchronously switched in accordance with the instruction of system switching between the electronic circuit boards in accordance with the time information.
Dependencies are inferred from the claim text.