High vt state used as erase condition in trap based nor flash cell design

A method of operating a flash device (100), comprising;

• erasing a portion of or an entire of the flash device by trapping a charge in a single program and erase entity (402) on a basis of the single program and erase entity, the single program and erase entity comprising two adjacent dual bit memory cells (404, 406) of the flash memory;
• and
• programming the portion of or the entire of the flash memory by neutralizing a charge in the single program and erase entity on the basis of the single program and erase entity.

A flash device (2500), comprising;

• a plurality of single program and erase entities (2502) comprising two adjacent dual bit physical memory cells of the flash device;
• and
• one or more decoders (2506, 2508) that select one or more single program and erase entities for erasing the flash device on a basis of the single program and erase entity by changing a voltage state of single program and erase entities to a high voltage state.