US 2010/0073979 A1 · High-voltage-resistant rectifier with standard CMOS transistors · patentgrep

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Abstract

A high-voltage-resistant rectifier with standard CMOS transistors is disclosed in present invention. In a bridge full-wave rectifier comprising four MOS transistors, extra transistors are connected in series between the transistors which endure high voltage and the input to decrease the voltage imposed on the gate of them; moreover, the present invention provides a way to divide voltage imposed between the gate and the source of the said transistors by connecting in series with extra transistors, so it is achieved to implement a high-voltage-resistant rectifier with standard low voltage CMOS transistors without additional process complexity, and decreases manufacture and process costs.

Claims10

Dependent claims

A high-voltage-resistant rectifier implemented with standard CMOS transistors, comprising from a first MOS transistor to a fourth MOS transistor as base structure, characterized in that includes:

in the said bridge full-wave rectifier, a sixth MOS transistor or a first capacitor is connected in series between the gate of a third MOS transistor which endures high voltage and a second input terminal of the rectifier to decrease the voltage imposed on the gate of the said third MOS transistor;
a seventh MOS transistor is connected in series between the source of the said third MOS transistor and a first input terminal of the said rectifier, and the voltage between the source and the drain of the said seventh transistor is used to divide the voltage imposed by positive and negative AC input signal between the gate and the source of the said third transistor;
in the said bridge full-wave rectifier, a fifth MOS transistor or a second capacitor is connected in series between the gate of a fourth MOS transistor which endures high voltage and the first input terminal of the rectifier to decrease the voltage imposed on the gate of the said fourth MOS transistor;
an eighth MOS transistor is connected in series between the source of the said fourth MOS transistor and the second input terminal of the said rectifier, and the voltage between the source and the drain of the said eighth MOS transistor is used to divide the voltage imposed by positive and negative AC input signal between the gate and the source of the said fourth transistor.

1 more element

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first NMOS transistor 103, the gate and the drain of which are connected with each other and then to a first input terminal 101, the source of which is connected to the source of a second NMOS transistor 104 as an output terminal 116 of the rectifier, the bulk of which is connected to the ground;
the second NMOS transistor 104, the gate and the drain of which are connected with each other and then to a second input terminal 102, the source of which is connected to the source of the first NMOS transistor 103 as the output terminal 116 of the rectifier, the bulk of which is connected to the ground;
a third NMOS transistor 105, the source of which is connected to the drain of an seventh NMOS transistor 109, the gate of which is connected to the source of a sixth NMOS transistor 108, the drain and the bulk of which are connected with each other and then to the ground;
a fourth NMOS transistor 106, the source of which is connected to the drain of an eighth NMOS transistor 110, the gate of which is connected to the source of a fifth NMOS transistor 107, the drain and the bulk of which are connected with each other and then to the ground;
the fifth NMOS transistor 107 or a second capacitor:
when as the fifth NMOS transistor 107, the drain of which is connected to the first input 101, the gate of which is connected to the output terminal 116 of the rectifier, the source of which is connected to the gate of the fourth NMOS transistor 106, the bulk of which is connected to the ground;
when as the second capacitor, one end of which is connected to the first input 101, the other is connected to the gate of the fourth NMOS transistor 106.
the sixth NMOS transistor 108 or first capacitor,:
when as the sixth NMOS transistor 108, the drain of which is connected to the second input terminal 102, the gate of which is connected to the output terminal 116 of the rectifier, the source of which is connected to the gate of the third NMOS transistor 105, the bulk of which is connected to the ground;
when as the first capacitor, one end of which is connected to the second terminal 102, the other is connected to the gate of the third NMOS transistor 105.
the seventh NMOS transistor 109, the source of which is connected to the first input terminal 101, the gate of which is connected to the output terminal 116 of the rectifier, the drain of which is connected to the source of the third NMOS transistor 105, the bulk of which is connected to the ground;
the eighth NMOS transistor 110, the source of which is connected to the second input terminal 102, the gate of which is connected to the output terminal 116 of the rectifier, the drain of which is connected to the source of the fourth NMOS transistor 106, the bulk of which is connected to the ground;
a loading resistor 115, one end of which is connected to the output terminal 116 of the rectifier, the other is connected to the ground.

10 more elements

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first PMOS transistor 203, the gate and the drain of which are connected with each other and then to a first input terminal 201, the source of which is connected to the ground, the bulk of which is connected to an output terminal 216;
a second PMOS transistor 204, the gate and the drain of which are connected to a second input 202, the source of which is connected to the ground, the bulk of which is connected to the output terminal 216;
a third PMOS transistor 205, the source of which is connected to the drain of a seventh PMOS transistor 209, the source of which is connected to the drain of a sixth PMOS transistor 208, the drain and the bulk of which are connected with each other and as the output terminal 216;
a fourth PMOS transistor 206, the source of which is connected to the drain of an eighth PMOS transistor 210, the gate of which is connected to the drain of a fifth PMOS transistor 207, the drain and the bulk of which are connected with each other and as the output terminal 216;
the fifth PMOS transistor 207 or a second capacitor:
when as the fifth PMOS transistor 207 the drain of which is connected to the first input terminal 201 the gate of which is connected to the ground, the drain of which is connected to the gate of the fourth PMOS transistor 206, the bulk of which is connected to the output terminal 216;
when as the second capacitor, one end of which is connected to the first input terminal 201, the other is connected to the gate of the fourth PMOS transistor 206.
the sixth PMOS transistor 208 or a first capacitor:
when as the sixth PMOS transistor 208, the source of which is connected to the input terminal 202, the gate of which is connected to the ground, the drain of which is connected to the gate of the third PMOS transistor 205, the bulk of which is connected to the output terminal 216;
when as the first capacitor, one end of which is connected to the second input terminal 202, the other is connected to the gate of third PMOS transistor 205.
the seventh PMOS transistor 209, the source of which is connected to the first input terminal 201, the source of which is connected to the ground, the drain of which is connected to the source of the third PMOS transistor 205, the bulk of which is connected to the output terminal 216;
the eighth PMOS transistor 210, the source of which is connected to the second input terminal 202, the gate of which is connected to the ground, the drain of which is connected to the source of the fourth PMOS transistor 206, the bulk of which is connected to the output terminal 216;
a load resistor 215, one end of which is connected to the output terminal 216, the other is connected to the ground.

10 more elements

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first PMOS transistor 303, the source of which is connected to a first input terminal 301, the gate, the drain and the bulk of which are connected with each other and then to the gate, the drain and the bulk of a second PMOS transistor 304 as an output terminal 316 of the rectifier;
the PMOS transistor 304, the source of which is connected to a second input terminal 302, the gate, the drain, the bulk are connected with each other and then to the gate, the drain, the bulk of the first PMOS transistor 303, as the output terminal 316 of the rectifier;
a third NMOS transistor 305, the source of which is connected to the drain of a seventh NMOS transistor 309, the gate of which is connected to the source of a sixth NMOS transistor 308, the drain and the bulk of which are connected with each other and then to the ground;
a fourth NMOS transistor 306, the source of which is connected to the drain of an eighth NMOS transistor 310, the gate of which is connected to the source of a fifth NMOS transistor 307, the drain and the bulk of which are connected with each other and then to the ground;
the fifth NMOS transistor 307 or a second capacitor:
when as the fifth NMOS transistor 307, the drain of which is connected to the input terminal 301, the gate of which is connected to the output terminal 316 of the rectifier, the source of which is connected to the gate of the fourth NMOS transistor 306, the bulk of which is connected to the ground;
when as the second capacitor, one end of which is connected to the first input terminal 301, the other is connected to the gate of the fourth NMOS transistor 306;
the sixth NMOS transistor 308 or a first capacitor:
when as the sixth NMOS transistor 308 the drain of which is connected to the second input terminal 302, the gate of which is connected to output terminal 316 of the rectifier, the source of which is connected to the gate of the third NMOS transistor 305, the bulk of which is connected to the ground;
when as the first capacitor, one end of which is connected to the second input terminal 302, the other is connected to the gate of the third NMOS transistor 305.
the seventh NMOS transistor 309, the source of which is connected to the first input terminal 301, the gate of which is connected to the output terminal 316 of the rectifier, the drain of which is connected to the source of the third NMOS transistor 305, the bulk of which is connected to the ground;
the eighth NMOS transistor 310, the source of which is connected to the second input terminal 302, the gate is connected to the output terminal 316 of the rectifier, the drain of which is connected to the source of the fourth NMOS transistor 306, the bulk of which is connected to the ground;
a loading resistor 315, one end of which is connected to the output terminal 316 of the rectifier, the other is connected to the ground.

10 more elements

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first NMOS transistor 403, the source of which is connected to a first input terminal 401, the gate, the drain and the bulk of which are connected with each other and then to the ground;
a second NMOS transistor 404, the source of which is connected to a second input terminal 402, the gate, the drain and the bulk of which are connected with each other and then to the ground;
a third PMOS transistor 405, the source of which is connected to the drain of a seventh PMOS transistor 409, the gate of which is connected to the drain of a sixth PMOS transistor 408, the drain and the bulk of which are connected with each other and as an output terminal 416 of the rectifier;
a fourth PMOS transistor 406, the source of which is connected to the drain of an eighth PMOS transistor 410, the gate of which is connected to the drain of a fifth PMOS transistor 407, the drain and the bulk of which are connected with each other and as the output terminal 416 of the rectifier;
the fifth PMOS transistor 407 or a second capacitor:
when as the fifth PMOS transistor 407, the source of which is connected to the first input terminal 401, the gate of which is connected to the ground, the drain of which is connected to the gate of the fourth PMOS transistor 406, the bulk of which is connected to the output terminal 416 of the rectifier;
when as the second capacitor, one end of which is connected to the first input terminal 401, the other is connected to the gate of the fourth PMOS transistor 406.
the sixth PMOS transistor 408 or the first capacitor:
when as the sixth PMOS transistor 408, the source of which is connected to the second input terminal 402, the gate of which is connected to the ground, the drain of which is connected to the gate of the third PMOS transistor 405, the bulk of which is connected to the output terminal 416 of the rectifier;
when as the first capacitor, one end of which is connected to the second input terminal 402, the other is connected the gate of the third PMOS transistor 405;
the seventh PMOS transistor 409, the source of which is connected to the first input terminal 401, the gate is connected to the ground, the drain of which is connected to the source of the third PMOS transistor 405, the bulk is connected to the output terminal 416 of the rectifier;
the eighth PMOS transistor 410, the source of which is connected to the second input terminal 402, the gate of which is connected to the ground, the drain of which is connected to the source of the fourth PMOS transistor 406, the bulk of which is connected to the output terminal 416 of the rectifier;
a loading resistor 415, one end of which is connected to the output terminal 416 of the rectifier, the other is connected to the ground.

10 more elements

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first PMOS transistor 505, the source of which is connected to the first input terminal 501, the gate of which is connected to the source of a ninth NMOS transistor 503, the drain and the bulk of which are connected with each other and as the output terminal 518 of the rectifier;
a second PMOS transistor 506, the source of which is connected to the second input terminal 502, the gate of which is connected to the source of an tenth NMOS transistor 504, the drain and the bulk of which are connected with each other and as the output terminal 518 of the rectifier;
a third NMOS transistor 507, the source of which is connected to the drain of a seventh NMOS transistor 511, the gate of which is connected to the source of a sixth NMOS transistor 510, the drain and the bulk of which are connected with each other and then to the ground;
a fourth NMOS transistor 508, the source of which is connected to the drain of an eighth NMOS transistor 512, the gate of which is connected to the source of a fifth NMOS transistor 509, the drain and the bulk of which are connected with each other and then to the ground;
the fifth NMOS transistor 509 or a second capacitor:
when as the fifth NMOS transistor 509, the drain of which is connected to the first input terminal 501, the gate of which is connected to the output terminal 518 of the rectifier, the source of which is connected to the gate of the fourth NMOS transistor 508, the bulk of which is connected to the ground;
when as the second capacitor, one end of which is connected to the first input terminal 501, the other is connected to the gate of the fourth PMOS transistor 508.
the sixth NMOS transistor 510 or a first capacitor:
when as the sixth NMOS transistor 510, the drain of which is connected to the second input terminal 502, the gate of which is connected to the output terminal 518 of the rectifier, the source of which is connected to the gate of the third NMOS transistor 507, the bulk of which is connected to the ground;
when as the first capacitor, one end of which is connected to the second input terminal 502, the other is connected to the gate of the third PMOS transistor 507.
the seventh NMOS transistor 511, the source of which is connected to the first input terminal 501, the gate of which is connected to the output terminal 518 of the rectifier, the drain of which is connected to the source of the third NMOS transistor 507, the bulk of which is connected to the ground;
the eighth NMOS transistor 512, the source of which is connected to the second input terminal 502, the gate of which is connected to the output terminal 518 of the rectifier, the drain of which is connected to the source of the fourth NMOS transistor 508, the bulk of which is connected to the ground;
the ninth NMOS transistor 503 or a third capacitor:
when as ninth NMOS transistor 503, the drain of which is connected to the second input terminal 502, the gate of which is connected to an output terminal 518 of the rectifier, the source of which is connected to the gate of the first PMOS transistor 505, the bulk of which is connected to the ground;
when as the third capacitor, one end of which is connected to the second input terminal 502, the other is connected to the gate of the first PMOS transistor 505.
the tenth NMOS transistor 504 or a fourth capacitor:
when as the tenth NMOS transistor 504, the drain of which is connected to the first input terminal 501, the gate of which is connected to the output terminal 518, of the rectifier the source of which is connected to the gate of the second PMOS transistor 506, the bulk of which is connected to the ground;
when as the fourth capacitor, one end of which is connected to the first input terminal 501, the other is connected to the gate of the second PMOS transistor 506.
a loading resistor 517, one end of which is connected to the output terminal 518 of the rectifier, the other is connected to the ground.

16 more elements

A high-voltage-resistant rectifier with standard CMOS transistors, characterized in that includes:

a first NMOS transistor 605, the source of which is connected to a first input terminal 601, the gate of which is connected to the drain of a ninth PMOS transistor 603, the drain and the bulk of which are connected with each other and then to the ground;
a second NMOS transistor 606, the source of which is connected to a second input terminal 602, the gate of which is connected to the drain of a tenth PMOS transistor 604, the drain and the bulk of which are connected with each other and then to the ground;
a third PMOS transistor 607, the drain of which is connected to the drain of a seventh PMOS transistor 611, the gate of which is connected to the drain of a sixth PMOS transistor 610, the drain and the bulk of which are connected with each other and then as an output terminal 618 of the rectifier;
a fourth PMOS transistor 608, the source of which is connected to the drain of an eighth PMOS transistor 612, the gate of which is connected to the drain of a fifth PMOS transistor 609, the drain and the bulk of which are connected with each other and as the output terminal 618 of the rectifier;
the fifth PMOS transistor 609 or a second capacitor:
when as the fifth PMOS transistor 609, the source of which is connected to the first input terminal 601, the gate of which is connected to the ground, the drain of which is connected to the gate of the fourth PMOS transistor 608, the bulk of which is connected to the output terminal 618 of the rectifier;
when as the second capacitor, one end of which is connected to the first input terminal 601, the other is connected to the gate of the fourth PMOS transistor 608.
the sixth PMOS transistor 610 or a first capacitor:
when as the sixth PMOS transistor 610, the source of which is connected to the second input terminal 602, the gate of which is connected to the ground, the drain of which is connected to the gate of the third PMOS transistor 607, the bulk of which is connected to the output terminal 618 of the rectifier;
when as the first capacitor, one end of which is connected to the second input terminal 602, the other is connected to the gate of the third PMOS transistor 607.
the seventh PMOS transistor 611, the source of which is connected to the first input terminal 601, the gate of which is connected to the ground, the drain of which is connected to the source of the third PMOS transistor 607, the bulk of which is connected to the output terminal 618 of the rectifier;
the eighth PMOS transistor 612, the source of which is connected to the second input terminal 602, the gate of which is connected to the ground, the drain of which is connected to the source of the fourth PMOS transistor 608, the bulk of which is connected to the output terminal 618 of the rectifier;
the ninth PMOS transistor 603 or a third capacitor:
when as ninth PMOS transistor 603, the source of which is connected to the second input terminal 602, the gate of which is connected to the ground, the drain of which is connected to the gate of the first NMOS transistor 605, the bulk of which is connected to an output terminal 618 of the rectifier;
when as the third capacitor, one end of which is connected to the second input terminal 602, the other is connected to the gate of the first PMOS transistor 605.
the tenth PMOS transistor 604 or a fourth capacitor:
when as the tenth PMOS transistor 604, the source of which is connected to the first input terminal 601, the gate of which is connected to the ground, the drain of which is connected to the gate of the second NMOS transistor 606, the bulk of which is connected to the output terminal 618 of the rectifier;
when as the fourth capacitor, one end of which is connected to the first input terminal 601, the other is connected to the gate of the second PMOS transistor 606.
a loading resistor 617, one end of which is connected to the output terminal 618 of the rectifier, the other is connected to the ground.

16 more elements

Dependencies are inferred from the claim text.