Liquid crystal display device having a shift register

An LCD device, comprising:

• a plurality of gate lines formed in an LCD panel;
• a plurality of driving stages, each of which sequentially outputting a respective enabling scan pulse to a corresponding one of the plurality of gate lines;
• and
• at least one dummy stage responsive to an enabling scan pulse from a first one of the plurality of driving stages and supplying a disabling scan pulse to a second one of the plurality of driving stages to disable outputting of the enabling scan pulse;
• and
• an RC load electrically connected to the at least one dummy stage;
• wherein each of the driving stage includes a first switching device for charging a first node with a high-potential voltage source in response to a start pulse or a enabling scan pulse of the preceding driving stage;
• a second switching device for discharging a second node with a low-potential voltage source in response to the start pulse or the enabling scan pulse of the preceding driving stage;
• a third switching device for charging the second node with the high-potential voltage source in response to a first clock pulse synchronized with the enabling scan pulse outputted from a following driving stage;
• a fourth switching device for discharging the first node with the low-potential voltage source in response to the high-potential voltage source charged in the second node;
• a fifth switching device for discharging the second node with the low-potential voltage source in response to the high-potential voltage source charged in the first node;
• a sixth switching device for discharging the first node with the low-potential voltage source in response to the enabling scan pulse outputted from the following driving stage;
• a pull-up switching device for outputting a second clock pulse prior to the first clock pulse as the enabling scan pulse in response to the high-potential voltage source charged in the first node;
• and a pull-down switching device for outputting the low-potential voltage source in response to the high-potential voltage source charged in the second node.