Oscillator, oscillator implementations and method of generating an oscillating signal

A oscillator, comprising:

• first-fourth transistors connected in series, the first and second transistors being of a first type, and the third and fourth transistors being of a second type, a connection of the first and second transistors being a first node, a connection of the second and third transistors being a second node, and a connection of the third and fourth transistors being a third node;
• fifth-eighth transistors connected in series, the fifth and sixth transistors being of the first type, and the seventh and eighth transistors being of the second type, a connection of the fifth and sixth transistors being a fourth node, a connection of the sixth and seventh transistors being a fifth node, and a connection of the seventh and eighth transistors being a sixth node, gates of the sixth and seventh transistors being connected to the second node, the fifth node being connected to gates of the second and third transistors;
• a first inverter, an input of the first inverter connected to the second node, an output of the first inverter connected to the first node, the third node, a gate of the fifth transistor and a gate of the eighth transistor;
• and
• a second inverter, an input of the second inverter connected to the fifth node, an output of the second inverter connected to the fourth node, the sixth node, a gate of the first transistor and a gate of the fourth transistor.

An oscillator, comprising:

• a first oscillator circuit, the first oscillator circuit including,
• a first starved inverter,
• a second starved inverter, an inner inverter of the second starved inverter being cross-coupled to an inner inverter of the first starved inverter,
• a first inverter, the first inverter having an input connected to output of the inner inverter of the first starved inverter, and
• a second inverter, the second inverter having an input connected to output of the inner inverter of the second starved inverter;
• and
• a second oscillator circuit, the second oscillator circuit including.
• a third starved inverter, the third starved inverter connected to an output of the first inverter,
• a fourth starved inverter, an inner inverter of the fourth starved inverter being cross-coupled to an inner inverter of the third starved inverter, the fourth starved inverter being connected to the output of the second inverter;
• a third inverter, the third inverter having an input connected to output of the inner inverter of the third starved inverter and having an output connected to the second starved inverter, and
• a fourth inverter, the fourth inverter having an input connected to output of the inner inverter of the fourth starved inverter and having an output connected to the first starved inverter.

An oscillator comprising:

• a first oscillating circuit, the first oscillating circuit including,
• a first and a second stage;
• the first stage including at least a pair of cross-coupled inverters;
• the second stage including at least one inverter connected to an output of one of the cross-coupled inverters;
• and
• a second oscillating circuit, the second oscillating circuit including,
• a third and fourth stage,
• the third stage including at least a pair of cross-coupled inverters, and receiving output from the inverter of the second stage;
• the fourth stage including at least one inverter connected to an output of one of the cross-coupled inverters, and supplying output to the first stage.

An oscillator, comprising:

• a first oscillator circuit, the first oscillator circuit including,
• first-fourth transistors connected in series, the first and second transistors being of a first type, and the third and fourth transistors being of a second type, a connection of the first and second transistors being a first node, a connection of the second and third transistors being a second node, and a connection of the third and fourth transistors being a third node,
• fifth-eighth transistors connected in series, the fifth and sixth transistors being of the first type, and the seventh and eighth transistors being of the second type, a connection of the fifth and sixth transistors being a fourth node, a connection of the sixth and seventh transistors being a fifth node, and a connection of the seventh and eighth transistors being a sixth node,
• a first inverter, an input of the first inverter connected to the second node, a gate of the sixth transistor and a gate of the seventh transistor, and
• a second inverter, an input of the second inverter connected to the fifth node, a gate of the second transistor and a gate of the third transistor;
• and
• a second oscillator circuit, the second oscillator circuit including,
• ninth-twelfth transistors connected in series, the ninth and tenth transistors being of a first type, and the eleventh and twelfth transistors being of a second type, a connection of the ninth and tenth transistors being a seventh node, a connection of the tenth and eleventh transistors being a eighth node, and a connection of the eleventh and twelfth transistors being a ninth node,
• thirteenth-sixteenth transistors connected in series, the thirteenth and fourteenth transistors being of the first type, and the fifteenth and sixteenth transistors being of the second type, a connection of the thirteenth and fourteenth transistors being a tenth node, a connection of the fourteenth and fifteenth transistors being a eleventh node, and a connection of the fifteenth and sixteenth transistors being a twelfth node,
• a third inverter, an input of the third inverter connected to the eighth node, a gate of the fourteenth transistor and a gate of the fifteenth transistor, an output of the third inverter connected to the fourth node, the sixth node, a gate of the first transistor and a gate of the fourth transistor, and
• a fourth inverter, an input of the fourth inverter connected to the eleventh node, a gate of the tenth transistor and a gate of the eleventh transistor, an output of the fourth inverter connected to the third node, the first node, a gate of the fifth transistor and a gate of the eighth transistor;
• and
• an output of the first inverter is connected to the seventh node, the ninth node, a gate of the thirteenth transistor and a gate of the sixteenth transistor;
• and
• an output of the second inverter is connected to the tenth node, the twelfth node, the gate of the ninth transistor and the gate of the twelfth transistor.