Duty cycle corrector and clock generator having the same

A duty cycle corrector, comprising:

• a positive delay unit configured to adjust an input clock with a delay value controlled in response to a positive increase control signal and a positive decrease control signal and to output a positive clock;
• a negative delay unit configured to adjust the inverted input clock with a delay value controlled in response to a negative increase control signal and a negative decrease control signal and to output a negative clock;
• a clock generator configured to generate a first clock that is activated from a predetermined edge of the positive clock to a predetermined edge of the negative clock, and to generate a second clock that is activated from a predetermined edge of the negative clock to a predetermined edge of the positive clock;
• and
• a detector configured to compare an activation interval of the first clock with that of the second clock and to output the positive increase control signal, the positive decrease control signal, the negative increase control signal and the negative decrease control signal.

A clock generator, comprising:

• a delay locked loop as single loop configured to generate an internal clock in response to an external clock;
• and
• a duty cycle corrector configured to correct a duty cycle of the internal clock,
• wherein the duty cycle corrector includes:
• a delay unit configured to adjust the internal clock and an inverted internal clock with a delay value controlled in response to one or more control signals and to generate a positive clock and a negative clock;
• and
• a duty detector configured to receive the positive clock and the negative clock, to detect duty ratios of the positive clock and the negative clock and to output the one or more control signals.