Switched-capacitor charge pump device for generation of output direct-current voltage with wide amplitude range

A switched-capacitor charge pump device for integration to a PLL (phase-locked loop) circuit system of the type having a phase detector capable of generating an output of a pump-up enable signal and a pump-down enable signal representative of a phase difference between an oscillating signal and a reference signal for generating an output direct-current (DC) voltage in response to the pump-up enable signal and the pump-down enable signal from the phase detector;

• the switched-capacitor charge pump device comprising:
• a first frequency divider, which is capable of performing a divide-by-2 frequency dividing operation on the oscillating signal to thereby generate a half-frequency oscillating signal;
• a second frequency divider, which is capable of performing a divide-by-2 frequency dividing operation on the reference signal to thereby generate a half-frequency reference signal;
• an output voltage comparing circuit, which is capable of comparing the output DC voltage against a half-amplitude drive voltage to thereby generate a drive-voltage switching enable signal;
• a first switch control unit, which is capable of generating a first set of switch control signals in response to the pump-up enable signal, the half-frequency oscillating signal, and the drive-voltage switching enable signal;
• a second switch control unit, which is capable of generating a second set of switch control signals in response to the pump-down enable signal, the half-frequency reference signal, and the drive-voltage switching enable signal;
• a first switched-capacitor circuit, which is composed of a first capacitor and a first switch array having a plurality of switches;
• wherein the first switch array is capable of being controlled by the first set of switch control signals from the first switch control unit by connecting the first capacitor in a predefined sequential order to a full-amplitude drive voltage, a half-amplitude drive voltage, a first current source, and an output port, such that the first capacitor is subjected to a switched charging-discharging operation to generate an output of a first capacitive voltage;
• and during the switched charging-discharging operation, the first switched-capacitor circuit is capable of responding to the drive-voltage switching enable signal from the output voltage comparing circuit by switching the first capacitor for connection to the half-amplitude drive voltage when the output DC voltage is lower than the half-amplitude drive voltage, and to the full-amplitude drive voltage when the output DC voltage is higher than the half-amplitude drive voltage;
• a second switched-capacitor circuit, which is composed of a second capacitor and a second switch array having a plurality of switches;
• wherein the second switch array is capable of being controlled by the second set of switch control signals from the second switch control unit by connecting the second capacitor in a predefined sequential order to the full-amplitude drive voltage, the half-amplitude drive voltage, a second current source, and the output port, such that the second capacitor is subjected to a switched charging-discharging operation to generate an output of a second capacitive voltage;
• and during the switched charging-discharging operation, the second switched-capacitor circuit is capable of responding to the drive-voltage switching enable signal from the output voltage comparing circuit by switching the second capacitor for connection to the half-amplitude drive voltage when the output DC voltage is lower than the half-amplitude drive voltage, and to the full-amplitude drive voltage when the output DC voltage is higher than the half-amplitude drive voltage;
• and
• an output capacitor circuit, which is connected to the output port and capable of being switched for connection between the first capacitive voltage generated by the first switched-capacitor circuit and the second capacitive voltage generated by the second switched-capacitor circuit to generate a capacitive voltage which is used to serve as the output DC voltage of the switched-capacitor charge pump device.

A switched-capacitor charge pump device for integration to a DLL (delay-locked loop) circuit system of the type having a phase detector capable of generating an output of a pump-up enable signal and a pump-down enable signal representative of a phase difference between an oscillating signal and a reference signal for generating an output direct-current (DC) voltage in response to the pump-up enable signal and the pump-down enable signal from the phase detector;

• the switched-capacitor charge pump device comprising:
• a first frequency divider, which is capable of performing a divide-by-2 frequency dividing operation on the oscillating signal to thereby generate a half-frequency oscillating signal;
• a second frequency divider, which is capable of performing a divide-by-2 frequency dividing operation on the reference signal to thereby generate a half-frequency reference signal;
• an output voltage comparing circuit, which is capable of comparing the output DC voltage against a half-amplitude drive voltage to thereby generate a drive-voltage switching enable signal;
• a first switch control unit, which is capable of generating a first set of switch control signals in response to the pump-up enable signal, the half-frequency oscillating signal, and the drive-voltage switching enable signal;
• a second switch control unit, which is capable of generating a second set of switch control signals in response to the pump-down enable signal, the half-frequency reference signal, and the drive-voltage switching enable signal;
• a first switched-capacitor circuit, which is composed of a first capacitor and a first switch array having a plurality of switches;
• wherein the first switch array is capable of being controlled by the first set of switch control signals from the first switch control unit by connecting the first capacitor in a predefined sequential order to a full-amplitude drive voltage, a half-amplitude drive voltage, a first current source, and an output port, such that the first capacitor is subjected to a switched charging-discharging operation to generate an output of a first capacitive voltage;
• and during the switched charging-discharging operation, the first switched-capacitor circuit is capable of responding to the drive-voltage switching enable signal from the output voltage comparing circuit by switching the first capacitor for connection to the half-amplitude drive voltage when the output DC voltage is lower than the half-amplitude drive voltage, and to the full-amplitude drive voltage when the output DC voltage is higher than the half-amplitude drive voltage;
• a second switched-capacitor circuit, which is composed of a second capacitor and a second switch array having a plurality of switches;
• wherein the second switch array is capable of being controlled by the second set of switch control signals from the second switch control unit by connecting the second capacitor in a predefined sequential order to the full-amplitude drive voltage, the half-amplitude drive voltage, a second current source, and the output port, such that the second capacitor is subjected to a switched charging-discharging operation to generate an output of a second capacitive voltage;
• and during the switched charging-discharging operation, the second switched-capacitor circuit is capable of responding to the drive-voltage switching enable signal from the output voltage comparing circuit by switching the second capacitor for connection to the half-amplitude drive voltage when the output DC voltage is lower than the half-amplitude drive voltage, and to the full-amplitude drive voltage when the output DC voltage is higher than the half-amplitude drive voltage;
• and
• an output capacitor circuit, which is connected to the output port and capable of being switched for connection between the first capacitive voltage generated by the first switched-capacitor circuit and the second capacitive voltage generated by the second switched-capacitor circuit to generate a capacitive voltage which is used to serve as the output DC voltage of the switched-capacitor charge pump device.