US 2010/0073039 A1Published application

H-Bridge circuit

AssigneeOki Semiconductor Co., Ltd.

InventorsMiyuki Kanai, Hirokazu Fujimaki, Takeshi Shimizu

Life of this patent

Estimating the term…

Loading patent…

Abstract

An H-bridge circuit includes a lower-arm field-effect transistor and a current supplying element that turns on when the drain of the lower-arm field-effect transistor is negatively biased due to regenerative current. When turned on, the current supplying element conducts current from the source to the drain of the lower-arm field-effect transistor, in parallel with a parasitic diode inherent in the lower-arm field effect transistor. The current supplying element competes with other parasitic elements that conduct current from peripheral circuitry to the drain of the lower-arm field-effect transistor, thereby reducing the amount of such current drawn through the peripheral circuitry and lessening the impact of the regenerative current on the peripheral circuits.

Claims13

Dependent claims

An H-bridge circuit having a power supply terminal, a ground terminal, a first node, and a second node, the H-bridge circuit comprising:

a first upper-arm MOSFET for conducting current between the power supply terminal and the first node;
a first lower-arm MOSFET for conducting current between the first node and the ground terminal, the first lower-arm MOSFET having a source connected to the ground terminal, a drain connected to the first node, and a first parasitic diode;
a second upper-arm MOSFET for conducting current between the power supply terminal and the second node;
a second lower-arm MOSFET for conducting current between the second node and the ground terminal, the second lower-arm MOSFET having a source connected to the ground terminal, a drain connected to the second node, and a second parasitic diode;
a coil load connected between the first node and the second node;
a first current supplying element connected in parallel with the first parasitic diode and conductively interconnecting the source and drain of the first lower-arm MOSFET when the drain of the first lower-arm MOSFET is negatively biased, thereby supplying current to the drain of the first lower-arm MOSFET;
and
a second current supplying element connected in parallel with the second parasitic diode and conductively interconnecting the source and drain of the second lower-arm MOSFET when the drain of the second lower-arm MOSFET is negatively biased, thereby supplying current to the drain of the second lower-arm MOSFET.

5 more elements

Dependencies are inferred from the claim text.