Method for testing a variable digital delay line and a device having variable digital delay line testing capabilities
AssigneeFreescale Semiconductor, Inc.
InventorsYefim-Haim Fefer, Mikhail Bourgart, Segey Sofer, Yoav Weizman
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Abstract
A device and a method for testing a variable digital delay line that includes multiple taps. The method includes providing, an input signal to the variable digital delay line and finding, for each tap out of a group of tested taps of the variable digital delay line, a variable delay unit configuration that provides a delay that is closest to a delay introduced by the tap; wherein the variable digital delay line and the variable delay unit belong to the same integrated circuit.
Claims20
A method for testing a variable digital delay line that comprises multiple taps, the method comprises:
- receiving, by the digital variable delay line, an input signal;
- finding, for each tap out of a group of taps of the variable digital delay line, a variable delay unit configuration, out of a group of possible variable delay unit configurations, that provides a delay that is closest to a delay introduced by the tap;
- wherein the variable digital delay line and the variable delay unit belong to the same integrated circuit.
A device having variable digital delay line testing capabilities, the device comprises:
- an integrated circuit that comprises a variable digital delay line, the variable digital delay line comprises multiple taps;
- a variable delay unit coupled to a control circuit;
- wherein the control circuit is adapted to find, for at least one tap of the variable digital delay line, a variable delay unit configuration, that provides a delay that is closest to a delay introduced by the tap.
Dependencies are inferred from the claim text.