Method and system for simulating state retention of an rtl design
AssigneeCadence Design Systems, Inc.
InventorYonghao CHEN
Life of this patent
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Abstract
Method and system for simulating state retention of an RTL design are disclosed. The method includes receiving a netlist description of the circuit represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, identifying one or more power domains of the circuit using the netlist description and the power information specifications, associating the one or more power domains and the power information specifications in the RTL design environment, where the one or more power domains are controlled by a set of power control signals through a power manager logic, and simulating state retention behavior in response to variations in power applied to the power domain.
Claims30
A method for simulating a circuit, comprising:
- receiving a netlist description of the circuit, wherein the netlist description is represented in a register-transfer-level (RTL) design environment;
- receiving power information specifications of the circuit;
- identifying one or more power domains of the circuit using the netlist description and the power information specifications;
- associating the one or more power domains and the power information specifications in the RTL design environment, wherein the one or more power domains are controlled by a set of power control signals through a power manager logic;
- and
- simulating state retention behavior in response to variations in power applied to the power domain.
A computer program product for simulating a circuit, comprising a medium storing computer programs for execution by one or more computer systems having at least a processing unit, a user interface and a memory, the computer program product comprising:
- code for receiving a netlist description of the circuit, wherein the netlist description is represented in a register-transfer-level (RTL) design environment;
- code for receiving power information specifications of the circuit;
- code for identifying one or more power domains of the circuit using the netlist description and the power information specifications;
- code for associating the one or more power domains and the power information specifications in the RTL design environment, wherein the one or more power domains are controlled by a set of power control signals through a power manager logic;
- and
- code for simulating state retention behavior in response to variations in power applied to the power domain.
Dependencies are inferred from the claim text.