Method and system for design rule checking enhanced with pattern matching

A computer aided design apparatus for generating a data file for a layer of a semiconductor device, comprising:

• a processor;
• a memory connected to the processor;
• and
• a computer readable medium having instructions embedded therein, the instructions configured to cause the processor to perform during design rule checking the operations of:
• comparing a plurality of patterns within the dataset against a plurality of design waivers;
• designating the plurality of patterns that match a design waiver as a plurality of valid patterns, wherein the design waiver comes from the plurality of design waivers;
• and
• running the dataset through a design rule checker.

A method for creating design waivers, comprising:

• designing a library of standard cells;
• assessing the manufacturability of the library of standard cells, wherein a region of the library of standard cells that is determined to be manufacturable is defined as a library of manufacturable standard cells;
• running a design rule check on the library of manufacturable standard cells, wherein the design rule check results in a plurality of design rule check errors;
• and
• capturing the plurality of design rule check errors as a plurality of design waivers for the library of manufacturable standard cells.

A computer program product having instructions embedded in a computer useable medium, the instructions configured to cause a processor to perform the operations of:

• comparing a plurality of patterns within a dataset against a plurality of design waivers;
• designating the plurality of patterns that match a design waiver as a plurality of valid patterns, wherein the design waiver comes from the plurality of design waivers;
• and
• running the dataset through a design rule checker.

A computer program product having instructions embedded in a computer useable medium, the instructions configured to cause a processor to perform the operations of:

• designing a library of standard cells;
• assessing the manufacturability of the library of standard cells, wherein a region of the library of standard cells that is determined to be manufacturable is defined as a library of manufacturable standard cells;
• running a design rule check on the library of manufacturable standard cells, wherein the design rule check results in a plurality of design rule check errors;
• and
• capturing the plurality of design rule check errors as a plurality of design waivers for the library of manufacturable standard cells.