Vector processing unit
AssigneeNEC Corporation
InventorNoritaka Hoshi
Life of this patent
Estimating the term…
Abstract
It is an object to speed up a vector store instruction on a memory that is divided into banks as setting a plurality of elements as a unit while minimizing an increase in physical quantity. A vector processing apparatus has a plurality of register banks and processes a data string including a plurality of data elements retained in the plurality of register banks, wherein: the plurality of register banks each have a read pointer 113 that points to a read position for reading the data elements; and the start position of the read pointer 113 is changed from one register bank to another. For example, consecutive numbers assigned to the register banks may be used as the read start positions of the respective register banks.
Claims8
1-7. (canceled)
A vector processing apparatus comprising:
- a plurality of register banks into which a vector register is divided;
- and a plurality of arithmetic units that perform multiple parallel operations corresponding to the plurality of register banks, the plurality of arithmetic units being connected with the respective plurality of register banks to process a data string including a plurality of data elements retained in the register banks, wherein
- each of the plurality of register banks each has a read pointer that points to one of the plurality of data elements corresponding to a vector register specified by an instruction word, and a start position of the read pointer is changed at every register bank.
Dependencies are inferred from the claim text.