Device and Method for Controlling Solid-State Memory System

A nonvolatile memory system comprising:

• a nonvolatile memory including a plurality of nonvolatile memory cells and a shift register;
• and
• a control device coupled to said nonvolatile memory, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memory,
• wherein said nonvolatile memory is enabled to operate a program operation,
• wherein in said program operation, said nonvolatile memory receives said data from said control device, stores said data to said shift register and stores said data in said shift register to ones of said nonvolatile memory cells,
• wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memory is operating in said program operation,
• wherein said shift register has a data storing capacity enabling the transfer of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte, and.
• wherein said non-volatile memory receives said data from said control device serially.

A nonvolatile memory system comprising:

• a nonvolatile memory including a plurality of nonvolatile memory cells and a shift register;
• and
• a control device coupled to said nonvolatile memory, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memory,
• wherein said nonvolatile memory is enabled to operate a program operation,
• wherein in said program operation, said nonvolatile memory receives said data from said control device, stores said data to said shift register and stores said data in said shift register to ones of said nonvolatile memory cells,
• wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memory is operating in said program operation,
• wherein said shift register has a data storing capacity enabling the transfer of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte, and,
• wherein the control device includes error correction circuitry whereby corresponding error correction code is generated for data received from outside of said nonvolatile memory device.

A nonvolatile memory system comprising:

• a plurality of nonvolatile memories each including a plurality of nonvolatile memory cells and a shift register;
• and
• a control device coupled to said nonvolatile memories, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memories,
• wherein said nonvolatile memories are enabled to operate a program operation,
• wherein in said program operation, each of said nonvolatile memories selectively receives said data from said control device, stores said data to said shift register thereof and stores said data in said shift register to ones of said nonvolatile memory cells of that nonvolatile memory,
• wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memories are operating in said program operation,
• wherein said shift register has a data storing capacity enabling the transfer of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte, and
• wherein said non-volatile memory receives said data from said control device serially.

A nonvolatile memory system comprising:

• a plurality of nonvolatile memories each including a plurality of nonvolatile memory cells and a shift register;
• and
• a control device coupled to said nonvolatile memories, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memories,
• wherein said nonvolatile memories are enabled to operate a program operation,
• wherein in said program operation, each of said nonvolatile memories selectively receives said data from said control device, stores said data to said shift register thereof and stores said data in said shift register to ones of said nonvolatile memory cells of that nonvolatile memory,
• wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memories are operating in said program operation, and
• wherein said shift register has a data storing capacity enabling the transfer of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte, and
• wherein the control device includes error correction circuitry whereby corresponding error correction code is generated for data received from outside of said nonvolatile memory device.

A nonvolatile memory system comprising:

• a plurality of nonvolatile memories each including a plurality of nonvolatile memory cells and a shift register;
• and
• a control device coupled to said nonvolatile memories, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memories,
• wherein said nonvolatile memories are enabled to operate a program operation,
• wherein in said program operation, each of said nonvolatile memories selectively receives said data from said control device, stores said data to said shift register thereof and stores said data in said shift register to ones of said nonvolatile memory cells of that nonvolatile memory,
• wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memories are operating in said program operation,
• wherein said shift register has a data storing capacity enabling the transfer of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte, and
• wherein prior to said nonvolatile memories selectively receiving said data from said control device, the nonvolatile memories receive a device specific address whereby a selected nonvolatile memory is specified.

A method of operating a nonvolatile memory system, the memory system including a controller and a first memory coupled to the controller, the first memory having a non-volatile memory array and a register having a capacity able to store a unit of data equivalent to the length of data to be stored at one time in a program operation, said data length being more than one byte, the method comprising:

• receiving data from outside of the nonvolatile memory system at the controller;
• subsequently transferring the data from the controller to the first memory;
• storing the data received from the controller in the register of the first memory;
• and
• thereafter writing the data from the register to non-volatile memory array of the first memory.

A method of operating a nonvolatile memory system including a plurality of memories each having a non-volatile memory array and a register having a capacity able to store a unit of data equivalent to the length of data to be stored at one time in a program operation, said data length being more than one byte, each of the memories having a plurality of pins with a device specific logical state on one or more of the corresponding pins, the method comprising:

• receiving at the memories an address;
• performing on the memories a comparison of a portion of the received address with the device specific logical states;
• selecting a first of the memories based upon the comparisons;
• subsequent to receiving at each of the memories the address, receiving data at the memories;
• storing the received data in the register of the first memory;
• and
• thereafter writing the data from the register to non-volatile memory array of the first memory.

A nonvolatile memory system comprising:

• a plurality of memories, each having:
• a non-volatile memory array;
• a register having a capacity able to store a unit of data equivalent to the length of data to be stored at one time in a program operation;
• programming circuitry connectable to the array and the register to write data content from the register to the array;
• device select circuitry;
• and
• a plurality of pins connectable to the device select circuitry with a device specific logical state on one or more of the pins;
• and
• a control module coupled to said nonvolatile memories, wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memories,
• wherein, in a program operation, the control module transfers an address to the memories and subsequently transfers data to the memories, and the memories compare in the device select circuitry a portion of the received address with the device specific logical states and a first of the memories is selected based upon the comparisons, the data being stored in the register of the first memory and subsequently written into the array of the first memory.