Photo key and method of fabricating semiconductor device using the photo key

A method for use in the fabricating of a semiconductor device, the method comprising:

• forming a plurality of gate patterns on a cell array region of a semiconductor substrate, and simultaneously forming dummy gate patterns on a photo key forming region of the substrate located outside and extending along the periphery of the cell array region;
• subsequently forming a first insulating layer over the substrate which buries the gate patterns and the photo key regions;
• performing a chemical-mechanical polishing (CMP) of the first insulating layer using the gate patterns and the dummy gate patterns as an etch stop layer;
• and
• performing a photolithography-based process to remove the insulating layer from between the gate patterns and from the photo key regions, the photolithography-based process comprising directing light towards the photo key forming region of the substrate, analyzing that portion of the light which is transmitted as an optical signal from the photo key region, and aligning exposure apparatus of photolithographic equipment with the substrate on the basis of the analysis of the optical signal.

A method for use in the fabricating of a semiconductor device, the method comprising:

• forming a plurality of gate patterns on a cell array region of a semiconductor substrate;
• forming a conductive pad pattern on the cell array region and between the gate patterns;
• forming a plurality of dummy gate patterns in each of photo key regions spaced apart from one another on a photo key forming region of the substrate, wherein the photo key forming region of the substrate is located outside and extends along the periphery of the cell array region;
• forming a plurality of dummy pad patterns between the dummy gate patterns in each of the photo key regions;
• forming a first insulating layer that insulates the gate patterns and the photo key regions;
• forming a second insulating layer which covers the conductive pad pattern, the gate patterns, the first insulating layer, and the photo key regions;
• forming a contact hole that extends through the second insulating layer and exposes the conductive pad pattern by performing a photolithography-based process, the photolithography-based process comprising directing light towards the photo key forming region of the substrate, analyzing that portion of the light which is transmitted as an optical signal from the photo key region, and aligning exposure apparatus of photolithographic equipment with the substrate on the basis of the analysis of the optical signal, whereby the dummy gate patterns and the dummy pad patterns are used as a transmissive photo key in the photolithography-based process;
• etching the second insulating layer away from off of the photo key regions and etching the first insulating layer away from between the photo key regions to expose the photo key regions;
• forming over the entire surface of the semiconductor substrate a conductive layer which fills the contact hole in the cell array region and covers the photo key regions conformally;
• and
• subsequently performing a second photolithography-based process comprising directing light towards the photo key forming region of the substrate, analyzing that portion of the light which is reflected from the photo key region as an optical signal, and aligning exposure apparatus of photolithographic equipment with the substrate on the basis of the analysis of the optical signal, whereby the dummy gate patterns and the dummy pad patterns are used as a stepped photo key.