Shared memory system
AssigneeFujitsu Limited
InventorTakeshi SHIMIZU
Life of this patent
Estimating the term…
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AssigneeFujitsu Limited
InventorTakeshi SHIMIZU
Estimating the term…
A shared memory system including: a shared memory includes a plurality of memory banks; a plurality of input ports; a plurality of input buffers; and a controller for controlling writing-into and reading out of the shared memory and for transferring data from each of the input buffers to the shared memory, wherein when one of the memory banks is cycled back next to the starting memory bank, another memory block is to be selected next for writing the remainder of a series of data, said controller controlling each of the input buffers to transfer a plurality of series of data to the shared memory successively with a time gap while switching to said another memory block, said controller offsetting a start memory bank in said another block for start writing the remainder of the series of data by an amount of memory banks corresponding to the time gap.
A shared memory system comprising:
Dependencies are inferred from the claim text.