Data bus control scheme for and image sensor and image sensor including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-Min Kim, Young-Kyun Jeong, Hae-Sick Sul
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Abstract
A memory system including a plurality of memory cells configured to receive digital signals includes an address decoder, a data bus, and a sense amplifier configured to receive data output from memory cells activated by addresses from the address decoder. The pre-charging the data bus and evaluating previous data by the sense amplifier occurs substantially simultaneously during a first period. The data bus and the sense amplifier are isolated from each other during the first period.
Claims21
A memory system including a plurality of memory cells configured to receive digital signals, the memory system comprising:
- an address decoder;
- a data bus;
- and
- a sense amplifier configured to receive data output from memory cells activated by addresses from the address decoder, wherein pre-charging the data bus and evaluating previous data by the sense amplifier occurs substantially simultaneously during a first period, wherein the data bus and the sense amplifier are isolated from each other during the first period.
A method of transferring data from a memory cell to a sense amplifier via a data bus, the method comprising:
- isolating the data bus from the sense amplifier;
- pre-charging the data bus;
- and
- evaluating, in the sense amplifier, previous data loaded from the data bus, evaluating substantially overlapping pre-charging.
An image pick-up device, comprising:
- a pixel array;
- an analog to digital converter configured to receive image data from the pixel array and to output corresponding digital signals;
- a memory array configured to store the digital signals output from the analog to digital converter;
- a data bus configured to be pre-charged and to load data from the memory array;
- a sense amplifier configured to receive data loaded in the data bus, to amplify the data, and to output amplified data;
- and
- an image signal processor configured to receive amplified data from the sense amplifier, wherein pre-charging the data bus and evaluating previous data by the sense amplifier occurs substantially simultaneously during a first period, the data bus and the sense amplifier being isolated from each other during the first period.
A machine-readable medium that provides executable instructions, which, when executed by a processor, cause the processor to perform a method of transferring data from a memory cell to a sense amplifier via a data bus, the method comprising:
- isolating the data bus from the sense amplifier;
- pre-charging the data bus;
- and
- evaluating, in the sense amplifier, previous data loaded from the data bus, evaluating substantially overlapping pre-charging.
A system, comprising:
- a processor;
- a memory device in communication with the processor;
- and
- an image sensor in communication with at least one of the processor and the memory device, the image sensor including,
- a pixel array;
- an analog to digital converter configured to receive image data from the pixel array and to output corresponding digital signals;
- a memory array configured to store the digital signals output from the analog to digital converter;
- a data bus configured to be pre-charged and to load data from the memory array;
- a sense amplifier configured to receive data loaded in the data bus, to amplify the data, and to output amplified data;
- and
- an image signal processor configured to receive amplified data from the sense amplifier, wherein pre-charging the data bus and evaluating previous data by the sense amplifier occurs substantially simultaneously during a first period, wherein the data bus and the sense amplifier are isolated from each other during the first period.
Dependencies are inferred from the claim text.