Signal driver circuit having an adjustable output voltage

A signal driver circuit having an output node, comprising:

• a pull-down transistor switch coupled to the output node and a reference node, the pull-down transistor configured to electrically couple the output node to the reference node in response to an input signal having a first logic level and decouple the output node from the reference node in response to the input signal having a second logic level;
• a pull-up transistor coupled to the output node and a voltage supply, the pull-up transistor configured to be conductive in response to the input signal having the second logic level and non-conductive in response to the input signal having a first logic level;
• and
• a switch circuit coupled to the voltage supply and the output node, the switch configured to couple the voltage supply to the output voltage node when the in signal has the second logic level and responsive to a voltage of the output node relative to a reference voltage.

A memory, comprising:

• a voltage supply;
• an array of memory cells arranged in rows and columns;
• a command decoder operable to decode received command signals and to generate control signals corresponding to the command signals;
• a data path coupled to the array of memory cells, the data path operable to couple read data from the array of memory cells and to couple write data to the array of memory cells;
• and
• a signal driver circuit having an output node coupled to the data path and configured to drive an output signal on the data path having a logic level according to an input signal, the signal driver circuit comprising:
• a signal driver configured to generate an output signal at the output node in response to the input signal;
• a transistor coupled to the signal driver and configured to be coupled to the voltage supply, the transistor configured to couple and decouple the output node and the voltage supply according to a control signal;
• and
• a voltage comparator circuit coupled to the output node and the transistor and configured to receive a reference voltage, the voltage comparator circuit configured to generate the control signal to control coupling and decoupling of the output node and the voltage supply through the transistor based on a voltage of the output signal relative to the reference voltage.

A processor-based system comprising:

• a processor;
• an input device;
• an output device;
• and
• a memory coupled to the processor and configured to receive an input clock signal, the memory comprising:
• a voltage supply;
• an array of memory cells arranged in rows and columns;
• a command decoder operable to decode received command signals and to generate control signals corresponding to the command signals;
• a data path coupled to the array of memory cells, the data path operable to couple read data from the array of memory cells and to couple write data to the array of memory cells;
• and
• a signal driver circuit having an output node coupled to the data path and configured to drive an output signal on the data path having a logic level according to an input signal, the signal driver circuit comprising:
• a signal driver configured to generate an output signal at the output node in response to the input signal;
• a transistor coupled to the signal driver and configured to be coupled to the voltage supply, the transistor configured to couple and decouple the output node and the voltage supply according to a control signal;
• and
• a voltage comparator circuit coupled to the output node and the transistor and configured to receive a reference voltage, the voltage comparator circuit configured to generate the control signal to control coupling and decoupling of the output node and the voltage supply through the transistor based on a voltage of the output signal relative to the reference voltage.

A method of generating an output signal at an output node in accordance to an input signal, comprising:

• coupling the output node to a supply voltage to generate generating an output signal at the output node having a high-logic level voltage in response to receiving an input signal having a first-logic level;
• comparing a voltage of the output signal to a reference voltage on which the high-logic level voltage is at least based in part, the reference voltage less than the supply voltage;
• and
• in response to the output signal being greater than the reference voltage and less than the supply voltage, controlling a transistor coupling the supply voltage to the output node to be non-conductive.