Shared masks for x-lines and shared masks for y-lines for fabrication of 3D memory arrays
AssigneeSanDisk 3D LLC
InventorRoy E. Scheuerlein
Life of this patent
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Abstract
A structure and a method of manufacturing a three dimensional memory using a number of bit line masks that is less than the number of device layers. A first bit line mask is used to form a first bit line layer in a first device level. The first bit line layer comprises first bit lines. The first bit line mask is also used to form a second bit line layer in a second device level. The second bit line layer comprises second bit lines. The first bit lines and the second bit lines have different electrical connections to a bit line connection level despite employing the same mask pattern.
Claims22
A method of manufacturing a three dimensional semiconductor device comprising:
- using a first bit line mask to form a first bit line layer in a first device level, wherein the first bit line layer comprises first bit lines;
- and
- using the first bit line mask to form a second bit line layer in a second device level, wherein the second bit line layer comprises second bit lines,
- wherein the first bit lines and the second bit lines have different electrical connections to a bit line connection level.
A three dimensional semiconductor device comprising:
- a first bit line layer in a first device level, wherein the first bit line layer has a first bit line pattern, wherein the first bit line layer comprises first bit lines;
- and
- a second bit line layer in a second device level, wherein the second bit line layer has the first bit line pattern, wherein the second bit line layer comprises second bit lines,
- wherein the first bit lines and the second bit lines have different electrical connections to a bit line connection level.
Dependencies are inferred from the claim text.