# US 2010/0045404 A1 · Phase error cancellation for differential signals

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- Number: US 2010/0045404 A1
- Document ID: US20100045404A1
- Status: Published application
- Kind: A1
- Application number: 12/197,894
- Filed: 2008-08-25
- Published: 2010-02-25
- Earliest claimed: 2008-08-25
- Assignees: WiLinx, Inc.
- Inventors: Mahdi Bagheri; Kaveh Moazzami; Filipp A. Baron; Mohammad E. Heidari; Rahim Bagheri
- Web page: https://patentgrep.com/patent/US20100045404A1

## CPC

- H03D 3/009: {Compensating quadrature phase or amplitude imbalances}
- H03H 7/21: providing two or more phase shifted output signals, e.g. n-phase output
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

## Claims

### Claim 1

An electronic circuit comprising:
a first stage having a first differential inductive element and a second differential inductive element; and
a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element,
wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error,
wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and
wherein the second phase error cancels the first phase error.

### Claim 2 (depends on 1)

The electronic circuit of claim 1 wherein the first and second differential inductive elements in the first stage are arranged symmetrically and the first and second differential inductive elements in the second stage are arranged symmetrically.

### Claim 3 (depends on 1)

The electronic circuit of claim 1 wherein at least one differential inductive element is configured according to a first polarity and each remaining differential inductor is configured according to an opposite polarity.

### Claim 4 (depends on 1)

The electronic circuit of claim 1 wherein the first stage includes an in-phase differential signal and a quadrature differential signal, and wherein the in-phase differential signal is coupled across the first differential inductive element in the first stage and the quadrature signal is coupled across the second differential inductive element in the first stage, and wherein the second stage includes an in-phase differential signal and a quadrature differential signal received from the first stage, and wherein the in-phase differential signal is coupled across the first differential inductive element in the second stage and the quadrature signal is coupled across the second differential inductive element in the second stage.

### Claim 5 (depends on 1)

The electronic circuit of claim 1 wherein the first and the second inductive elements of the first stage match and have a first inductance value, wherein the first and the second inductive elements of the second stage match and have a second inductance value.

### Claim 6 (depends on 5)

The electronic circuit of claim 5 wherein the second inductance value is equal to the first inductance value.

### Claim 7 (depends on 5)

The electronic circuit of claim 5 wherein the second inductance value is not equal to the first inductance value.

### Claim 8 (depends on 5)

The electronic circuit of claim 5 wherein the first stage has a first distance between the first and the second inductive elements, wherein the second stage has a second distance between the first and the second inductive elements.

### Claim 9 (depends on 8)

The electronic circuit of claim 8 wherein the second distance is equal to the first distance.

### Claim 10 (depends on 8)

The electronic circuit of claim 8 wherein the second distance is not equal to the first distance.

### Claim 11 (depends on 1)

The electronic circuit of claim 1 wherein the first stage comprises matching first and second differential circuits, wherein the first inductive element is configured as a load for the first differential circuit and the second inductive element is configured as a load for the second differential circuit.