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US 2010/0023569 A1Published application
Method for computerized arithmetic operations
AssigneeDaw Shien Scientific Research & Development, Inc.
InventorsJames Shihfu Shiao, Albert Shihyung Shiao
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Abstract
A method of computing arithmetic operations more efficiently than the conventional Arithmetic Logic Unit (ALU) is disclosed. By encoding both operands from Binary Coded Decimal (BCD) codes (0000, to 1001) into decimal digits (0 to 9), inputting them in the GerTh's™ look-up tables, which are made of an array of AND gates, the invention finds the answer more efficiently. This method finds the result in fewer steps than a traditional ALU by reducing the repetitive calculation steps and logic gates required. And this new method makes the unsolvable computerized binary floating-point multiplications and divisions back to the solvable GerTh's computerized decimal digits' (0-9) elementary arithmetic operations.
Claims11
A method for computerized arithmetic operations comprising:
- (a) receiving all digits from the first addend and at least a first digit from a first adder wherein the first addend and first adder each have at least one digit, and a decimal digit counter equals zero;
- (b) triggering a digit position corresponding to the first digit from the first addend to an excited state in a first digit encoder and triggering a digit position corresponding to the first digit from a first adder to an excited state in a second digit encoder;
- (c) adding a zero from a carry-in flip-flop to a first addend and moving the first digit of the first addend to a storage flip flop and obtaining a first carry-out digit;
- (d) adding the first digit of the first addend to the first digit of the adder;
- (e) producing a result digit and a second carry-out digit;
- (f) moving the result digit to a result buffer through a decimal data bus and moving the first and second carry-out digits to an OR gate;
- (g) storing a final carry-out digit from the output of the OR gate into the carry-in flip-flop;
- (h) clearing the inputs of look-up tables;
- and,
- (i) triggering the decimal digit counter to increase by one;
7 more elements
A method for computerized arithmetic operations comprising:
- (a) receiving a minuend and a subtrahend wherein the minuend and subtrahend each have at least one digit;
- (b) comparing the minuend with the subtrahend to verify that the minuend is greater than or equal to the subtrahend, if the subtrahend is greater than the minuend, the subtrahend swap positions with the minuend;
- (c) triggering a digit position corresponding to the first digit of the minuend to an excited state in a first digit encoder and triggering a digit position corresponding to the first digit of the subtrahend to an excited state in a second digit encoder and a decimal digit counter equals zero;
- (d) subtracting a borrow-in digit zero from a borrow-in flip-flop from the first digit of the minuend and moving the first digit of the minuend to a storage flip flop and obtaining a first borrow-in digit;
- (e) subtracting the first digit of the subtrahend from the first digit of the minuend;
- (f) producing a result digit and a second borrow-in digit;
- (g) moving the result digit to a result buffer through the decimal data bus;
- (h) moving the first and second borrow-in digits to an OR gate;
- (i) storing a first final borrow-in digit from the output of the OR gate into the borrow-in flip-flop;
- (j) clearing the inputs of look-up tables;
- (k) triggering the decimal digit counter to increase by one;
- and,
- (l) wherein the process of steps (a) through (k) can be repeated iteratively for finding/calculating more result digits.
10 more elements
A method for computerized arithmetic operations comprising:
- (a) receiving all digits from a multiplicand and a first digit from a multiplier wherein the multiplicand and the multiplier each have at least one digit and a result digit counter equals zero;
- (b) triggering a digit position corresponding to the first digit of the multiplicand to an excited state in a first digit encoder and triggering a digit position corresponding to the first digit of the multiplier to an excited state in a second and a third digit encoders;
- (c) multiplying the first digit of the multiplicand from the first digit encoder with the first digit of the multiplier from the second digit encoder at a first multiplication look-up table;
- (d) producing a first result digit and a first carry-out digit;
- (e) receiving the first result digit to a result buffer and triggering a multiplicand digit counter and the result digit counter to increase by one;
- (f) activating a second digit of the multiplicand to the excited state in the fourth digit encoder and multiplying a second digit of the multiplicand from a fourth digit encoder with the first digit of the multiplier from the third digit encoder at a second multiplication look-up table;
- (g) producing a second digit temporary result and a second carry-out digit;
- (h) adding the second digit temporary result with the first carry-out digit at an addition look-up table to obtain a second result digit and a third carry-out digit;
- (i) receiving the second result digit in a result buffer and triggering a multiplicand digit counter and the result digit counter to increase by one;
- (j) clearing the inputs of the multiplication look-up tables and the inputs of the addition look-up table;
- (k) combining the second and third carry-out digits to obtain a first final carry-out digit as a new input to the addition look-up table;
- and,
- if the product of the multiplicand and multiplier is less than 100 or greater than 9, an answer consists of the first and second result digits.
10 more elements
A method for computerized arithmetic operations comprising:
- (a) receiving a divisor and a dividend, wherein a decimal digit counter position of the dividend starts from a most significant digit;
- (b) comparing the dividend to the divisor to verify that the divisor does not equal zero and moving a decimal point position of the divisor to the right of the least significant digit and moving a decimal point position of the dividend the same number of digits;
- (c) multiplying the repositioned divisor by one to nine and storing a divisor products result in a result buffer;
- (d) moving the position of the dividend to increase the dividend by a factor of 10 if the repositioned dividend is smaller than the divisor and writing a zero with a decimal point to the result as a quotient digit, and the decimal digit counter is decreased by one;
- (e) repeating step (d) until the repositioned dividend is greater than the divisor;
- (f) selecting the products result that is closest to the repositioned dividend, and is less than or equal to the repositioned dividend;
- (g) choosing a multiplier of that selected product result to be one of the quotient digits;
- (h) subtracting that selected divisor product result from the repositioned dividend to create a remainder;
- (i) multiplying the remainder by a factor of 10 to obtain a subsequent dividend;
- (j) repeating step (d), (e), (f), (g), (h), and (i) until the remainder is zero or a predetermined decimal place is reached.
7 more elements
Dependencies are inferred from the claim text.