Termination of secure execution mode in a microprocessor providing for execution of secure code
AssigneeVIA Technologies, Inc.
InventorsG. Glenn Henry, Terry Parks
Life of this patent
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AssigneeVIA Technologies, Inc.
InventorsG. Glenn Henry, Terry Parks
Estimating the term…
An apparatus providing for a secure execution environment including a microprocessor and a secure non-volatile memory. The microprocessor is configured to execute non-secure application programs and a secure application program, where the non-secure application programs are accessed from a system memory via a system bus. The microprocessor has secure execution mode logic that is configured to detect execution of a secure execution mode return event, and that is configured to terminate a secure execution mode within the microprocessor, where the secure execution mode exclusively supports execution of the secure application program. The secure non-volatile memory is coupled to the microprocessor via a private bus and is configured to store the secure application program prior to termination of the secure execution mode, where transactions over the private bus between the microprocessor and the secure non-volatile memory are isolated from the system bus and corresponding system bus resources within the microprocessor.
An apparatus providing for a secure execution environment, comprising:
A microprocessor apparatus, for executing secure code within a secure execution environment, the microprocessor apparatus comprising:
A method for executing secure code within a secure execution environment, the method comprising:
Dependencies are inferred from the claim text.